US2007007657A1PendingUtilityA1

Methods for forming conductive vias in a substrate and electronic devices and systems including an at least partially reversed oxidation injury at an interface between a conductive via and a conductive interconnect structure

Individually held — no corporate assignee on recordPriority: Jan 29, 2004Filed: Sep 5, 2006Published: Jan 11, 2007
Est. expiryJan 29, 2024(expired)· nominal 20-yr term from priority
H10W 20/057H10W 20/084H10W 20/081H10W 20/033
47
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Methods for forming conductive vias in a substrate include oxidizing at least a portion of a metallic structure that is exposed through an opening in a substrate to form an oxidation injury in the metallic structure. The oxidation injury is at least partially reversed, and conductive material is provided within the opening in the substrate. Electronic devices and systems include at least one conductive via extending through a substrate and contacting at least one conductive interconnect structure along an interface. The conductive interconnect structure includes an at least partially reversed oxidation injury at the interface between the conductive via and the interconnect structure.

Claims

exact text as granted — not AI-modified
1 . A method for forming a conductive via in a substrate, comprising: oxidizing at least a portion of a metallic structure exposed through an opening in a substrate to form 
 an oxidation injury in at least a portion of the metallic structure; at least partially reversing the oxidation injury in the at least a portion of the metallic structure; and providing conductive material within the opening in the substrate, the conductive material    communicating electrically with the conductive structure.    
   
   
       2 . The method according to  claim 1 , wherein oxidizing at least a portion of a metallic structure comprises oxidizing at least a portion of a metallic structure comprising copper.  
   
   
       3 . The method according to  claim 1 , further comprising forming the metallic structure on or in the substrate from at least one metal selected from the group consisting of palladium, platinum, nickel, copper, gold, silver, and cobalt prior to oxidizing the at least a portion of the metallic structure.  
   
   
       4 . The method according to  claim 1 , wherein at least partially reversing the oxidation injury in the at least a portion of the metallic structure comprises exposing the oxidation injury to a reducing plasma.  
   
   
       5 . The method according to  claim 4 , wherein exposing the oxidation injury to a reducing plasma comprises exposing the oxidation injury to hydrogen ions.  
   
   
       6 . The method according to  claim 5 , wherein exposing the oxidation injury to a reducing plasma further comprises exposing the oxidation injury to a reducing plasma including atoms or ions of an inert gas.  
   
   
       7 . The method according to  claim 1 , wherein oxidizing at least a portion of a metallic structure exposed through an opening in a substrate to form an oxidation injury in at least a portion of the metallic structure comprises forming copper oxide.  
   
   
       8 . The method according to  claim 7 , wherein at least partially reversing the oxidation injury in the at least a portion of the metallic structure comprises reducing the copper oxide to copper.  
   
   
       9 . The method according to  claim 1 , wherein providing conductive material within the opening in the substrate comprises forming a metallic plug that passes through a plurality of intermetal insulating layers.  
   
   
       10 . The method according to  claim 1 , wherein oxidizing at least a portion of a metallic structure comprises oxidizing at least a portion of a metallic structure in a chamber, and wherein at least partially reversing the oxidation injury comprises at least partially reversing the oxidation injury in the chamber without removing the substrate from the chamber after oxidizing at least a portion of a metallic structure in a chamber.  
   
   
       11 . The method according to  claim 1 , further comprising forming a diffusion barrier layer comprising tungsten-nitride over the substrate within the opening before providing conductive material within the opening in the substrate.  
   
   
       12 . The method according to  claim 1 , further comprising providing a cleaning agent within the opening in the substrate before providing conductive material within the opening in the substrate.  
   
   
       13 . The method according to  claim 12 , wherein providing a cleaning agent within the opening in the substrate comprises providing aqueous dilute hydrofluoric acid within the opening in the substrate.  
   
   
       14 . An electronic device comprising at least one conductive via extending through a substrate and contacting at least one conductive interconnect structure along an interface, the conductive interconnect structure including an at least partially reversed oxidation injury at the interface between the at least one conductive via and the at least one conductive interconnect structure.  
   
   
       15 . The electronic device of  claim 14 , wherein the at least one conductive interconnect structure comprises a conductive trace or a conductive pad.  
   
   
       16 . The electronic device of  claim 14 , wherein the at least one conductive via and the at least one conductive interconnect each comprise copper.  
   
   
       17 . The electronic device of  claim 14 , wherein the at least partially reversed oxidation injury comprises a partially reversed oxidation injury, the partially reversed oxidation injury comprising: 
 a first region comprising substantially pure metal; and    at least a second region comprising a metal oxide.    
   
   
       18 . The electronic device of  claim 17 , wherein the substantially pure metal comprises copper, and wherein the metal oxide comprises copper oxide.  
   
   
       19 . An electronic system, comprising: 
 a microprocessor; and    an integrated circuit coupled to the microprocessor;    wherein at least one of the microprocessor and the integrated circuit comprises at least one conductive via extending through a substrate and contacting at least one conductive interconnect structure along an interface, the conductive interconnect structure including an at least partially reversed oxidation injury at the interface between the at least one conductive via and the at least one conductive interconnect structure.    
   
   
       20 . The electronic system of  claim 19 , wherein the microprocessor and the integrated circuit are integrated on the same chip.

Join the waitlist — get patent alerts

Track US2007007657A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.