Method to manufacture silicon quantum islands and single-electron devices

Abstract

The present invention provides a method of manufacturing a single-electron transistor device ( 100 ). The method includes forming a thinned region ( 110 ) in a silicon substrate ( 105 ), the thinned region ( 110 ) offset by a non-selected region ( 115 ). The method also includes forming at least one quantum island ( 145 ) from the thinned region ( 110 ) by subjecting the thinned region ( 110 ) to an annealing process. The non-selected region ( 115 ) is aligned with the quantum island ( 145 ) and tunnel junctions ( 147 ) are formed between the quantum island ( 145 ) and the non-selected region ( 115 ). The present invention also includes a single-electron device ( 200 ), and a method of manufacturing an integrated circuit ( 300 ) that includes a single-electron device ( 305 ).

1 . A single-electron device, including: 
 at least one quantum island composed of silicon on a buried oxide layer of a silicon-on-insulator substrate; and    source and drain electrodes composed of said silicon and aligned with said quantum island, wherein said quantum island is located between said source and drain with tunnel junctions between said source and drain.    
     
     
         2 . The single-electron transistor device as recited in  claim 1 , wherein said at least one quantum island has a diameter that ranges about 10 to about 100 nanometers.  
     
     
         3 . The single-electron transistor device as recited in  claim 1 , wherein said at least one quantum island comprises a plurality of quantum islands having an average pitch of about 200 nanometers or less.  
     
     
         4 . The single-electron device as recited in  claim 1 , further including a gate electrode configured to modulate a tunneling barrier of said tunnel junctions when a voltage is applied to said gate electrode.  
     
     
         5 . The single-electron transistor device as recited in  claim 4 , wherein said gate electrode is composed of said silicon, and said gate electrode said source and drain and said quantum island are located in substantially a same plane.  
     
     
         6 . The single-electron transistor device as recited in  claim 5 , wherein said source and drain and said quantum island are located in substantially a same plane and said gate electrode is located substantially out of said plane.