US2007004221A1PendingUtilityA1

Methods for forming material layers with substantially planar surfaces on semiconductor device structures

Assignee: WHITMAN JOHNPriority: Apr 4, 2000Filed: Sep 8, 2006Published: Jan 4, 2007
Est. expiryApr 4, 2020(expired)· nominal 20-yr term from priority
H10W 20/062H10W 10/0145H10W 10/17H10D 1/712
49
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Claims

Abstract

Methods for partially or substantially filling recesses (e.g., capacitor containers, shallow trenches for formation of shallow trench isolation (STI) structures, etc.) That communicate with a surface of the semiconductor device structure include applying material to a surface of the semiconductor device structure and spreading the material. The thickness of the material covering the surface may be less than (e.g., about half of or less than half of) the depths of the recesses. The surface may remain substantially uncovered by the material.

Claims

exact text as granted — not AI-modified
1 . A method for masking a stacked capacitor structure, comprising: 
 applying a layer of mask material to a semiconductor device structure; and    spreading the mask material across the semiconductor device structure so as to substantially fill at least one container of the capacitor structure and cover a layer of conductive material over a surface of the at least one container with a thickness of about less than half a depth of the at least one container.    
   
   
       2 . The method of  claim 1 , wherein spreading comprises spreading the mask material so as to substantially fill at least one container including a surface coated with hemispherical grain polysilicon.  
   
   
       3 . The method of  claim 1 , wherein spreading comprises spinning the mask material across the semiconductor device structure.  
   
   
       4 . The method of  claim 3 , wherein spinning comprises: 
 rotating the semiconductor device structure at a first speed;    decreasing a rate of the rotating to a second speed; and    gradually increasing the rate of rotating to a third speed.    
   
   
       5 . The method of  claim 4 , wherein decreasing the rate follows rotating the semiconductor device structure at the first speed.  
   
   
       6 . The method of  claim 5 , wherein gradually increasing the rate follows decreasing the rate.  
   
   
       7 . The method of  claim 1 , wherein spreading comprises substantially filling the at least one container with the mask material while leaving the layer of conductive material covering the surface substantially uncovered by the mask material.  
   
   
       8 . The method of  claim 1 , further comprising: 
 removing the layer of conductive material covering the surface.    
   
   
       9 . The method of  claim 8 , wherein removing comprises etching the layer of conductive material.  
   
   
       10 . The method of  claim 9 , wherein etching comprises wet etching the layer of conductive material.  
   
   
       11 . The method of  claim 9 , wherein etching comprises dry etching the layer of conductive material.  
   
   
       12 . The method of  claim 8 , wherein, while removing, the at least one container remains substantially filled with the mask material.  
   
   
       13 . The method of  claim 8 , further comprising 
 removing the mask material from the at least one container.    
   
   
       14 . A method for forming a shallow trench isolation structure, comprising: 
 applying mask material to a semiconductor substrate;    spreading the mask material across the semiconductor substrate so as to substantially fill at least one shallow trench recessed in a surface of the semiconductor substrate, the mask material covering the surface as a result of spreading having a thickness of less than about half a depth of the at least one shallow trench; and    exposing at least the mask material to a dopant so as to conductively dope semiconductor material beneath the surface without substantially doping semiconductor material located beneath the at least one shallow trench.    
   
   
       15 . The method of  claim 14 , wherein spreading comprises spinning the mask material across the semiconductor substrate.  
   
   
       16 . The method of  claim 15 , wherein spinning comprises: 
 rotating the semiconductor substrate at a first speed;    decreasing a rate of rotating to a second speed; and    gradually increasing the rate of rotating to a third speed.    
   
   
       17 . The method of  claim 16 , wherein decreasing the rate follows rotating the semiconductor substrate at the first speed.  
   
   
       18 . The method of  claim 17 , wherein gradually increasing the rate is effected after decreasing the rate.  
   
   
       19 . The method of  claim 14 , wherein spreading comprises substantially filling the at least one shallow trench with the mask material while leaving the surface substantially uncovered by the mask material.  
   
   
       20 . The method of  claim 14 , wherein exposing includes implanting conductivity dopant into regions of the semiconductor substrate continuous with the surface without implanting conductivity dopant into regions of the semiconductor substrate continuous with a bottom of the at least one shallow trench.  
   
   
       21 . The method of  claim 14 , further comprising: 
 removing the mask material from the semiconductor substrate.

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