Semiconductor device fabrication methods employing substantially planar buffer material layers to improve the planarity of subsequent planarazation processes

Abstract

A method for fabricating a semiconductor device structure includes applying a stress buffer material onto a semiconductor device structure and spreading the stress buffer material. When the stress buffer material is spread, it substantially fills recesses formed in a surface of the semiconductor device structure and imparts the stress buffer material with a substantially planar surface. The thickness of the stress buffer material covering the surface of the semiconductor device structure may be less than the depths of the recesses. The surface may remain substantially uncovered by the material.

1 . A method for fabricating a semiconductor device structure, comprising: 
 providing a semiconductor device structure with a surface, at least one recess formed in the surface, and a material layer at least partially covering the surface and substantially filling said at least one recess, the material layer having a nonplanar surface;    applying a stress buffer material to the material layer; and    spreading said stress buffer material over the material layer so as to impart the stress buffer material with a substantially planar surface without subsequently planarizing the stress buffer material.    
   
   
       2 . The method of  claim 1 , wherein providing comprises providing the semiconductor device structure with said nonplanar surface of the material layer including at least one peak located substantially over the surface and at least one valley located substantially over the at least one recess.  
   
   
       3 . The method of  claim 1 , wherein spreading comprises spinning the stress buffer material across the semiconductor device structure.  
   
   
       4 . The method of  claim 3 , wherein spinning comprises: 
 rotating the semiconductor device structure at a first speed;    decreasing a rate of rotating to a second speed; and    gradually increasing the rate of rotating to a third speed.    
   
   
       5 . The method of  claim 4 , wherein decreasing the rate follows rotating.  
   
   
       6 . The method of  claim 5 , wherein gradually increasing the rate follows decreasing the rate.  
   
   
       7 . The method of  claim 2 , wherein spreading comprises at least partially filling the at least one valley with the stress buffer material while leaving the at least one peak substantially uncovered by the stress buffer material.  
   
   
       8 . The method of  claim 7 , further comprising: 
 planarizing at least the material layer.    
   
   
       9 . The method of  claim 8 , wherein planarizing comprises etching at least one region of the material layer exposed through the stress buffer material with selectivity over the stress buffer material.  
   
   
       10 . The method of  claim 9 , wherein etching is effected until a surface of the at least one region is in substantially the same plane as the substantially planar surface of the stress buffer material.  
   
   
       11 . The method of  claim 10 , wherein planarizing further comprises abrasively planarizing the stress buffer material and the at least one region to expose the surface adjacent the at least one recess, the surface and a surface of material in said at least one recess being located in substantially the same plane after planarizing.  
   
   
       12 . The method of  claim 10 , wherein planarizing further comprises concurrently etching the material layer and the stress buffer material at substantially the same rate so as to expose the surface adjacent the at least one recess, with the surface and a surface of material in the at least one recess being located in substantially the same plane after planarizing.  
   
   
       13 . The method of  claim 9 , wherein etching is effected until the surface of the semiconductor device structure is exposed through the material layer.  
   
   
       14 . The method of  claim 13 , wherein etching is effected until a surface of material in the at least one recess is in substantially the same plane as the surface.  
   
   
       15 . The method of  claim 13 , further comprising: 
 removing the stress buffer material from the semiconductor device structure.    
   
   
       16 . The method of  claim 2 , wherein spreading comprises forming a substantially planar surface over the semiconductor device structure.  
   
   
       17 . The method of  claim 16 , further comprising: 
 planarizing at least the material layer.    
   
   
       18 . The method of  claim 17 , wherein planarizing comprises substantially concurrently abrasively planarizing the stress buffer material and the material layer to expose the surface adjacent the at least one recess, the surface and a surface of material in the at least one recess being located in substantially the same plane after planarizing.  
   
   
       19 . The method of  claim 17 , wherein planarizing comprises substantially concurrently etching the material layer and the stress buffer material at substantially the same rate so as to expose the surface adjacent the at least one recess, with the surface and a surface of material in the at least one recess being located in substantially the same plane after planarizing.  
   
   
       20 . The method of  claim 1 , wherein providing the semiconductor device structure comprises providing a shallow trench isolation structure with the at least one recess comprising at least one trench and the material layer comprising electrical insulator material.  
   
   
       21 . The method of  claim 1 , wherein providing comprises providing a semiconductor device structure with at least one recess comprising a dual damascene trench and the material layer comprising conductive material.