Protective circuit for a thin film transistor and a liquid crystal display device

Abstract

An input-output (I/O) protective circuit having more stable I/O protective function for use in the liquid crystal display device and including in one embodiment a resistance provided between an I/O terminal pad and an I/O primary stage thin film transistor, a wiring connecting the I/O terminal pad with the resistance, and two I/O protective thin film transistors connected in series between a ground terminal and a power source terminal. The above wiring is connected with each joint portion of the two I/O protective thin film transistors and, each of the two I/O protective thin film transistors has p-type substrate potential fixing terminals and n-type substrate potential fixing terminals, which are connected with each of the channel layers of the I/O protective thin film transistors, and p-type substrate potential fixing terminals and n-type substrate potential fixing terminals are connected with the ground terminals.

1 . A protective circuit for a thin film transistor formed from a protective thin film transistor connected with an input circuit of a protected thin film transistor, comprising: 
 a p-type substrate potential fixing terminal and an n-type substrate potential fixing terminal, both of which are connected with the channel layer of said protective thin film transistor; and    a ground terminal connected with said p-type and n-type substrate potential fixing terminals.    
   
   
       2 . A protective circuit for a thin film transistor connected with an input circuit of a protected thin film transistor, comprising: 
 a first protective thin film transistor connected with said input circuit and having a p-type substrate potential fixing terminal and an n-type substrate potential fixing terminal in its channel layer acting against surge noise input on the positive side;    a second protective thin film transistor connected with said input circuit and having a p-type substrate potential fixing terminal and an n-type substrate potential fixing terminal in its channel layer acting against surge noise input on the negative side; and    a ground terminal connected with p-type substrate potential fixing terminals and n-type substrate potential fixing terminals of said first and second protective thin film transistors.    
   
   
       3 . A protective circuit for a thin film transistor as claimed in  claim 1  or  2 , wherein the width of a gate of said protective thin film transistor is larger than the width of a gate of said protected thin film transistor.  
   
   
       4 . A protective circuit for a thin film transistor as claimed in  claim 1  or  2 , wherein the width of the gate of said protective thin film transistor is 100 μm or more.  
   
   
       5 . A protective circuit for a thin film transistor as claimed in  claim 1  or  2 , wherein said protected thin film transistor has a p-type substrate potential fixing terminal and an n-type substrate potential fixing terminal in its channel layer, and wherein said p-type and n-type substrate potential fixing terminals are connected with a substrate bias generation circuit.  
   
   
       6 . A protective circuit for a thin film transistor as claimed in  claim 1 , 
 a breakdown voltage and a hold voltage of said protective thin film transistor are made respectively lower than a breakdown voltage and a hold voltage of the thin film transistor of said protected circuit or those of a thin film transistor used as a switching element for driving a pixel.    
   
   
       7 . A liquid crystal display device having a glass substrate, a switching thin film transistor circuit provided at each pixel position on said glass substrate, and a liquid crystal panel having a drive circuit for driving the switching thin film transistor, 
 wherein a protective thin film transistor is connected with an input circuit of a primary stage thin film transistor which gives a voltage (current) to an opposing electrode of said liquid crystal panel;    wherein said protective thin film transistor is a transistor having a p-type substrate potential fixing terminal and an n-type substrate potential fixing terminal in its channel layer; and    wherein a circuit for connecting said p-type substrate potential fixing terminal and said n-type substrate potential fixing terminal are connected with a ground terminal is provided.    
   
   
       8 . A liquid crystal display device having a protective circuit formed from a protective thin film transistor, connected with the input circuit of a protected thin film transistor, comprising: 
 a p-type substrate potential fixing terminal and an n-type substrate potential fixing terminal provided in a channel layer of the thin film transistor of said protective circuit; and    a ground terminal connected with said p-type substrate potential fixing terminal and said n-type substrate potential fixing terminal,    wherein a breakdown voltage and a hold voltage of said protective thin film transistor are respectively made lower than those of said protected thin film transistor or the thin film transistor used as a switching element for driving a pixel.    
   
   
       9 . A liquid crystal display device comprising: 
 a resistance connected between a terminal pad and a protected thin film transistor;    a wiring connecting said terminal pad with said resistance; and    two protective thin film transistors connected in series between a ground terminal and a source terminal, wherein 
 said wiring is connected with a joint portion of said two protective thin film transistors;  
 each of said two protective thin film transistors has a p-type substrate potential fixing terminal and an n-type substrate potential fixing terminal connected with its channel layer;  
 said p-type and n-type substrate potential fixing terminals are connected with the ground terminal; and  
 the breakdown voltage and the hold voltage of said protective thin film transistor are respectively made lower than those of said primary stage thin film transistor or a thin film transistor used as a switching element for driving the pixel.  
   
   
   
       10 . A liquid crystal display device as claimed in  claim 9 , 
 said protected thin film transistor has the p-type and n-type substrate potential fixing terminals connected with the channel layer and connects said p-type and n-type substrate potential fixing terminals connected with a substrate bias generation circuit.    
   
   
       11 . A protective circuit formed from a protective thin film transistor connected with the input circuit of a protected thin film transistor, comprising: 
 a p-type and an n-type substrate potential fixing terminals provided in the channel layer of said protective thin film transistor; and    a ground terminal connected with said p-type and n-type substrate potential fixing terminals,    wherein a breakdown voltage and a hold voltage of said protective thin film transistor are made respectively lower than those of said protected thin film transistor or of a thin film transistor used as a switching element for driving a pixel.