US2006292789A1PendingUtilityA1
Structure and method for collar self-aligned to buried plate
Est. expiryJun 16, 2024(expired)· nominal 20-yr term from priority
H10P 50/692H10B 12/0387H10B 12/0383H10B 12/0385
51
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Claims
Abstract
A structure and method are provided for forming a collar surrounding a portion of a trench in a semiconductor substrate, the collar having a lower edge self-aligned to a top edge of a buried plate disposed adjacent to a lower portion of the trench.
Claims
exact text as granted — not AI-modified1 - 15 . (canceled)
16 . A structure including a capacitor formed along a sidewall of a trench in a semiconductor substrate, the structure including a collar surrounding a middle portion of the trench, the collar having a lower edge self-aligned to a top edge of a buried plate disposed adjacent to a lower portion of the trench.
17 . A structure as claimed in claim 16 , wherein the collar consists essentially of an oxide.
18 . A structure as claimed in claim 17 , wherein the structure further includes a transistor having a channel region formed in the semiconductor substrate, the transistor having a conductive connection to the capacitor.
19 . A structure as claimed in claim 18 , wherein the channel region of the transistor extends vertically along a sidewall of the trench above the collar.
20 . A structure as claimed in claim 17 , wherein the buried plate is doped with arsenic.
21 . A structure formed inside a semiconductor substrate, said structure comprising:
a trench; a capacitor formed along a sidewall of said trench; and a collar surrounding a middle portion of said trench, said collar having a lower edge, said lower edge being self-aligned to a top edge of a buried plate disposed adjacent to a lower portion of said trench.
22 . The structure according to claim 21 , wherein said collar consists essentially of an oxide.
23 . The structure according to claim 22 , further comprising a transistor having a channel region formed in the semiconductor substrate, the transistor having a conductive connection to the capacitor.
24 . The structure according to claim 23 , wherein the channel region of the transistor extends vertically along a sidewall of the trench above the collar.
25 . The structure according to claim 22 , wherein the buried plate is doped with arsenic.
26 . A semiconductor device formed in a substrate, said semiconductor device comprising:
a trench filled at least partially with a conductive material; a capacitor formed around a lower portion of said trench; and a collar formed above said lower portion of said trench, said collar having a lower edge, said lower edge being self-aligned to a top edge of a buried plate disposed adjacent to said lower portion of said trench.
27 . The semiconductor device according to claim 26 , wherein said buried plate is doped with arsenic.
28 . The semiconductor device according to claim 27 , wherein said capacitor comprises said buried plate, said conductive material filling said trench, and a layer of dielectric material being disposed between said buried plate and said conductive material.
29 . The semiconductor device according to claim 26 , wherein said collar consists essentially of an oxide.
30 . The semiconductor device according to claim 26 , further comprising a transistor having a channel region formed in the semiconductor substrate, said transistor having a conductive connection to the capacitor.
31 . The semiconductor device according to claim 30 , wherein said channel region of said transistor extends along a sidewall of said trench above said collar.
32 . The semiconductor device according to claim 31 , wherein said transistor has a gate conductor, said gate conductor being isolated from said capacitor by a trench top oxide.Join the waitlist — get patent alerts
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