Embedding thin film resistors in substrates in power delivery networks

Abstract

Using die side capacitors and embedded resistors, an advantageous power delivery network may be achieved. In some embodiments, the embedded resistors may be more precisely controllable. The number of die side capacitors may be reduced by combining embedded resistors with these capacitors to reduce costs. The embedded resistors may be provided within the metallization layers either at an upper layer or a lower layer, as two examples.

1 . an integrated circuit comprising: 
 a decoupling capacitor; and    an embedded resistor electrically coupled to said decoupling capacitor.    
   
   
       2 . The circuit of  claim 1  including at least two metallization layers, said embedded resistor being positioned between the upper of said metallization layers.  
   
   
       3 . The circuit of  claim 1  including at least two metallization layers, said embedded resistor being associated with the lower of said metallization layers.  
   
   
       4 . The circuit of  claim 1  wherein said capacitor is U-shaped and includes a pair of downwardly extending legs and lands to electrically contact said legs.  
   
   
       5 . The circuit of  claim 4  including a pad spaced from one of said lands, said resistor being situated electrically between said pad and one of said lands.  
   
   
       6 . The circuit of  claim 5  wherein said resistor is coupled through said pad to a power supply metallization.  
   
   
       7 . The circuit of  claim 3  wherein one of said metallizations is a power supply metallization, said power supply metallization having an opening, said resistor being formed in said opening.  
   
   
       8 . The circuit of  claim 7  wherein said resistor is coupled to said capacitor, said capacitor being U-shaped and sitting on two spaced pads, one of said pads being coupled by a via to said power supply metallization.  
   
   
       9 . The circuit of  claim 8  including a plurality of vias extending from said resistor to a pad coupled to said capacitor.  
   
   
       10 . The circuit of  claim 1  including a plurality of parallel resistors formed as embedded thin film resistors.  
   
   
       11 . A system comprising: 
 a printed circuit board;    a power supply coupled to said printed circuit board; and    an integrated circuit coupled to said printed circuit board, said integrated circuit including a decoupling capacitor and an embedded resistor electrically coupled to said decoupling capacitor.    
   
   
       12 . The system of  claim 11 , said integrated circuit including at least two metallization layers, said embedded resistor being positioned over the upper of said metallization layers.  
   
   
       13 . The system of  claim 11 , said integrated circuit including at least two metallization layers, said embedded resistor being associated with the lower of said metallization layers.  
   
   
       14 . The system of  claim 11  wherein said capacitor is U-shaped and includes a pair of downwardly extending legs and lands to electrically contact said legs.  
   
   
       15 . The system of  claim 14  including a pad spaced from one of said lands, said resistor being situated electrically between said pad and one of said lands.  
   
   
       16 . The system of  claim 15  wherein said resistor is coupled through said pad to a power supply metallization.  
   
   
       17 . The system of  claim 13  wherein one of said metallizations is a power supply metallization, said power supply metallization having an opening, said resistor situated in said opening.  
   
   
       18 . The system of  claim 17  wherein said resistor is coupled to said capacitor, said capacitor being U-shaped and sitting on two spaced pads, one of said pads being coupled by a via to said power supply metallization.  
   
   
       19 . The system of  claim 18  including a plurality of vias extending from said resistor to a pad coupled to said capacitor.  
   
   
       20 . The system of  claim 11  including a plurality of parallel resistors formed as embedded thin film resistors.  
   
   
       21 . A method comprising: 
 forming a power delivery network including a decoupling capacitor and an embedded thin film resistor coupled to metallization layers of an integrated circuit.    
   
   
       22 . The method of  claim 21  including providing an upper and a lower metallization layer.  
   
   
       23 . The method of  claim 22  including forming said thin film resistor on said lower metallization layer.  
   
   
       24 . The method of  claim 22  including forming said thin film resistor on said upper metallization layer.  
   
   
       25 . The method of  claim 21  including forming an integrated capacitor in a U-shape, said capacitor having two free arms, coupling said free arms to metal pads and coupling said metal pads to said metallizations.  
   
   
       26 . The method of  claim 25  including forming a second pad spaced from one of said pads connected to said capacitor and forming said resistor between said spaced pads.  
   
   
       27 . The method of  claim 26  including forming a via from said second pad to a power supply or ground metallization.  
   
   
       28 . The method of  claim 25  including varying the size of said thin film resistor using photolithography.  
   
   
       29 . The method of  claim 21  including providing a plurality of parallel thin film embedded resistors.  
   
   
       30 . The method of  claim 28  including coupling said pads to metallizations using at least two parallel paths between each pad in each metallization.