Semiconductor device, liquid crystal display panel, electronic device, and method of manufacturing semiconductor device

Abstract

In a plurality of transistors in which the thresholds that are required in the circuit design are equal, a transistor having an initial threshold at a lower limit within an acceptable range of the required threshold is arranged at a circuit position where an absolute value of a threshold voltage increases by operating, and a transistor having an initial threshold at an upper limit within an acceptable range of the required threshold is arranged at a circuit position where an absolute value of a threshold voltage decreases by operating.

1 . A semiconductor device including a plurality of transistors in which the thresholds that are required in the circuit design are equal, wherein: 
 a transistor having an initial threshold at a lower limit within an acceptable range of said required threshold is arranged at a circuit position where an absolute value of a threshold voltage increases by operating, and    a transistor having an initial threshold at an upper limit within an acceptable range of said required threshold is arranged at a circuit position where an absolute value of a threshold voltage decreases by operating.    
   
   
       2 . The semiconductor device according to  claim 1 , wherein said transistor is a P-channel transistor, wherein said circuit position where the absolute value of the threshold voltage increases by operating is high potential side of a power supply voltage, and wherein said circuit position where the absolute value of the threshold voltage decreases by operating is low potential side of a power supply voltage.  
   
   
       3 . The semiconductor device according to  claim 1 , wherein a doping concentration of a channel region in said transistor having the initial threshold at the lower limit within the acceptable range is different from a doping concentration of a channel region in said transistor having the initial threshold at the upper limit within the acceptable range.  
   
   
       4 . The semiconductor device according to  claim 1 , wherein a length of a channel region in said transistor having the initial threshold at a lower limit within an acceptable range is shorter than a length of a channel region of said transistor having an initial threshold at an upper limit within an acceptable range.  
   
   
       5 . The semiconductor device according to  claim 1 , further comprising a film that is arranged between said substrate and said transistor having the initial threshold at the lower limit within the acceptable range or said transistor having the initial threshold at the upper limit within the acceptable range, said film is made of a material which is different from said substrate in conductivity.  
   
   
       6 . The semiconductor device according to  claim 1 , wherein said transistor is a thin film transistor formed on an insulating substrate.  
   
   
       7 . A liquid crystal display panel comprising: 
 a first substrate in which the semiconductor device according to  claim 1  is formed on a base;    a second substrate arranged in parallel with said first substrate to provide a space; and    a liquid crystal layer arranged between said first substrate and said second substrate.    
   
   
       8 . An electronic device having the liquid crystal display panel according to  claim 7 .  
   
   
       9 . An electronic device having the semiconductor device according to  claim 1 .  
   
   
       10 . A method of manufacturing a semiconductor device including a plurality of transistors in which the thresholds that are required in the circuit design are equal, wherein, a transistor having an initial threshold at a lower limit within an acceptable range of said required threshold is arranged at a circuit position where an absolute value of a threshold voltage increases by operating, and a transistor having an initial threshold at an upper limit within an acceptable range of said required threshold is arranged at a circuit position where an absolute value of a threshold voltage decreases by operating.  
   
   
       11 . The method of manufacturing the semiconductor device according to  claim 10 , wherein said transistor is a P-channel transistor, wherein said circuit position where the absolute value of the threshold voltage increases by operating is high potential side of a power supply voltage, and wherein said circuit position where the absolute value of the threshold voltage decreases by operating is low potential side of a power supply voltage.  
   
   
       12 . The method of manufacturing the semiconductor device according to  claim 10 , wherein said step of forming transistors comprises the steps of: 
 forming a semiconductor film on a substrate;    patterning said semiconductor film to form an active layer of said transistors;    forming a gate insulating film of said transistors on said active layer;    forming gate electrodes of said transistors on said gate insulating film; and    implanting impurities into said active layer to form source/drain regions of said transistors:    wherein, in the step of forming said semiconductor film, the doping concentration of channel region in said transistor having the initial threshold at the lower limit within the acceptable range is different from a doping concentration of a channel region in said transistor having the initial threshold at the upper limit within the acceptable range.    
   
   
       13 . The method of manufacturing the semiconductor device according to  claim 10 , wherein said step of forming transistors comprises the steps of: 
 forming a semiconductor film on a substrate;    patterning said semiconductor film to form an active layer of said transistors;    forming a gate insulating film of said transistors on said active layer;    forming a gate electrode of said transistors on said gate insulating film;    and    implanting impurities into said active layer to form source/drain regions of said transistors:    wherein, in the step of forming said source/drain regions, a length of a channel region in said transistor having the initial threshold at the lower limit within the acceptable range is shorter than a length of a channel region in said transistor having the initial threshold at the upper limit within the acceptable range.    
   
   
       14 . The method of manufacturing the semiconductor device according to  claim 10 , wherein said step of forming transistors comprises the steps of: 
 forming a film on a substrate on which said transistor having the initial threshold at the lower limit within the acceptable range or said transistor having the initial threshold at the upper limit within the acceptable range is formed, said film is made of a material which is different from said substrate in conductivity;    forming an amorphous semiconductor film on said substrate;    crystallizing said amorphous semiconductor film to form a semiconductor film;    patterning said semiconductor film to form an active layer of said transistors;    forming a gate insulating film of said transistors on said active layer;    forming gate electrodes of said transistors on said gate insulating film; and    implanting impurities into said active layer to form source/drain regions of said transistors.