Method of manufacturing semiconductor device and semiconductor device

Abstract

A semiconductor device comprising a metal silicide film with uniform surface morphology and interface morphology and a method of manufacturing the same are provided. The metal silicide film of the semiconductor device exhibits low sheet resistance and excellent thermal stability. Therefore, by using the semiconductor device fabrication method, high performance, high quality semiconductor devices can be manufactured.

1 . A method of manufacturing a semiconductor device, the method comprising: 
 forming a diffusion barrier film on a Si-containing substrate or a Si film;    forming a metal film on the diffusion barrier film; and    annealing the resultant structure so that the Si-containing substrate or the Si film reacts with the metal film to form a metal silicide film,    wherein the diffusion barrier film, which is different from the metal film, is made of at least one selected from the group consisting of Mo, Ta, Mn, Cr, W, Pd, Au, Ag, Cu, Hf, Fe, Zn, Ru, Pb, Mg, and alloys thereof.    
   
   
       2 . The method according to  claim 1 , further comprising removing unreacted metal after the formation of the metal silicide film.  
   
   
       3 . The method according to  claim 1 , wherein the Si-containing substrate is made of one selected from the group consisting of monocrystalline Si, polycrystalline Si, doped Si, amorphous Si, Si x Ge 1−x  where x is any number satisfying 0<x<1, Si x N 1−x  where x is any number satisfying 0<x<1, and SiC.  
   
   
       4 . The method according to  claim 1 , wherein the metal film is made of at least one selected from the group consisting of Ni, Ti, Pt, Pd, Ir, Ta, Nb, V, Cr, Hf, Zr, Mo, and alloys thereof.  
   
   
       5 . The method according to  claim 1 , wherein the diffusion barrier film has a thickness of 0.1 to 100 nm.  
   
   
       6 . The method according to  claim 1 , wherein the metal film has a thickness of 1 to 1,000 nm.  
   
   
       7 . The method according to  claim 1 , wherein the resultant structure is annealed at a temperature of 100 to 1,000° C.  
   
   
       8 . The method according to  claim 1 , wherein the metal silicide film is formed only on an upper surface of a Si-containing gate region and a high-concentration impurity region of a source/drain region with a LDD structure of the semiconductor device.  
   
   
       9 . The method according to  claim 1 , wherein the annealing is carried out in such a manner that the diffusion barrier film adjusts diffusion flux of a metal of the metal film so that the metal of the metal film uniformly reacts with Si of the Si-containing substrate or the Si film.  
   
   
       10 . The method according to  claim 1 , wherein the diffusion barrier film and the metal film are formed by e-beam evaporation, CVD, PVD, MBE, or sputtering.  
   
   
       11 . The method according to  claim 1 , wherein the semiconductor device is a CMOS logic device, a memory device, or an embedded memory device.  
   
   
       12 . A semiconductor device comprising a Si-containing gate region, a gate oxide film, a sidewall spacer, and a source/drain region with a LDD structure, all of which are formed in/on a Si-containing substrate, wherein the device further comprises a metal silicide film containing 0.1 to 10 atomic % of Mo which is selectively formed only at the surfaces of the Si-containing gate region and the source/drain region.  
   
   
       13 . The semiconductor device according to  claim 12 , wherein the metal silicide film is a nickel silicide film.  
   
   
       14 . The semiconductor device according to  claim 12 , wherein the device is a CMOS logic device, a memory device, or an embedded memory device.  
   
   
       15 . The semiconductor device according to  claim 13 , wherein the device is a CMOS logic device, a memory device, or an embedded memory device.  
   
   
       16 . A semiconductor device comprising a nickel silicide film containing 0.1 to 10 atomic % of Mo.  
   
   
       17 . The semiconductor device according to  claim 16 , wherein the device is a CMOS logic device, a memory device, or an embedded memory device.