US2006285617A1PendingUtilityA1

Precise synchronization of distributed systems

36
Individually held — no corporate assignee on recordPriority: Dec 11, 2001Filed: Jul 10, 2006Published: Dec 21, 2006
Est. expiryDec 11, 2021(expired)· nominal 20-yr term from priority
Inventors:Keith Michael RobertsStephen Ems
H03L 7/00
36
PatentIndex Score
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Claims

Abstract

A method for synchronizing a plurality of sub-systems, comprising the steps of measuring a relationship between a divider associated with each of the plurality of sub-systems; and adjusting a phase of one or more of the dividers to a known relationship with one of the dividers. A command is issued synchronous to a divider associated with one of the plurality of sub-systems. The command is received at one of the sub-systems and is acted upon synchronous to a divider associated with the one of the sub-system receiving said command.

Claims

exact text as granted — not AI-modified
1 . A system comprising a plurality of sub-systems desired to be operated synchronously, each of said sub-systems comprising: 
 a divider for dividing a received clock signal and generating a signal including a plurality of clock signal edges, a phase of said signal issued from said divider being adjustable based upon a comparison with a phase of a signal issued from a divider of another of said plurality of sub-systems;    a receiver for receiving a command to be implemented by said sub-system; and    a control mechanism for implementing said received command at a predetermined one of said plurality of clock signal edges.    
     
     
         2 . The system as described in  claim 1 , wherein a direct measurement of phase (or timing) of said signals issued from said dividers is used to determine a phase difference therebetween.  
     
     
         3 . The system as described in  claim 1 , wherein a phase measurement of a known analog input relative to a divider of each sub-system is used to determine a phase difference therebetween.  
     
     
         4 . The system as described in  claim 3 , wherein a variation of a delay calibration routine is used to determine the relative phase of each divider.  
     
     
         5 . The system as described in  claim 1 , wherein an adjustment technique based on a gated clock is used to adjust the phase of the divider.  
     
     
         6 . The system as described in  claim 1 , wherein a series of digitizers and an analog trigger are synchronized.  
     
     
         7 . The system as described in  claim 6 , wherein a point in time specifically related to the trigger event is determined.  
     
     
         8 . The system as described in  claim 6 , wherein a decimator is started on a series of digitizer channels in phase.  
     
     
         9 . The system as described in  claim 7 , wherein said system is a digital oscilloscope.  
     
     
         10 . A method for operating a system comprising a plurality of sub-systems synchronously, comprising the steps of: 
 dividing a received clock signal and generating at each sub-system a signal including a plurality of clock signal edges, a phase of said signal issued from a divider of a first of said plurality of sub-systems being adjustable based upon a comparison with a phase of a signal issued from a divider of another of said plurality of sub-systems;    receiving a command to be implemented by said sub-system; and    implementing said received command at a predetermined one of said plurality of clock signal edges.    
     
     
         11 . The method as described in  claim 10 , wherein a direct measurement of phase (or timing) of said signals issued from said dividers is used to determine a phase difference therebetween.  
     
     
         12 . The method as described in  claim 10 , wherein a phase measurement of a known analog input relative to a divider of each sub-system is used to determine a phase difference therebetween.  
     
     
         13 . The method as described in  claim 12 , wherein a variation of a delay calibration routine is used to determine the relative phase of each divider.  
     
     
         14 . The method as described in  claim 10 , wherein an adjustment technique based on a gated clock is used to adjust the phase of the divider.  
     
     
         15 . The method is as described in  claim 14 , wherein an additional adjustment with a fine delay element is used to adjust the phase of the dividers to a fraction of the clock period.  
     
     
         16 . The method as described in  claim 10 , wherein a series of digitizers and an analog trigger are synchronized.  
     
     
         17 . The method as described in  claim 16 , wherein a point in time specifically related to the trigger event is determined.  
     
     
         18 . The method as described in  claim 16 , wherein a decimator is started on a series of digitizer channels in phase.  
     
     
         19 . The method as described in  claim 10 , wherein said system is a digitized oscilloscope.  
     
     
         20 . A method for synchronizing a plurality of sub-systems, comprising the steps of: 
 measuring a relationship between a divider associated with each of said plurality of sub-systems;    adjusting a phase of one or more of said dividers to a known relationship with one of said dividers;    issuing a command synchronous to a divider associated with one of said plurality of sub-systems;    receiving said command at one of said sub-systems; and    acting upon said command synchronous to a divider associated with said one of said sub-system receiving said command.    
     
     
         21 - 23 . (canceled)

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