US2006282648A1PendingUtilityA1

Network topology for a scalable multiprocessor system

Assignee: SILICON GRAPHICS INCPriority: Sep 29, 1999Filed: Dec 6, 2005Published: Dec 14, 2006
Est. expirySep 29, 2019(expired)· nominal 20-yr term from priority
G06F 15/17343H04L 45/14H04L 67/1001G06F 15/17381G06F 15/17312
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Claims

Abstract

A system and method for interconnecting a plurality of processing element nodes within a scalable multiprocessor system is provided. Each processing element node includes at least one processor and memory. A scalable interconnect network includes physical communication links interconnecting the processing element nodes in a cluster. A first set of routers in the scalable interconnect network route messages between the plurality of processing element nodes. One or more metarouters in the scalable interconnect network route messages between the first set of routers so that each one of the routers in a first cluster is connected to all other clusters through one or more metarouters.

Claims

exact text as granted — not AI-modified
1 . A massively parallel processing system comprising: 
 a plurality of processing element nodes;    a scalable interconnection network comprising: 
 a plurality of physical communication links; and  
 a plurality of first level routers for interconnecting the plurality of processing element nodes in a cluster; and  
 one or more metarouters for interconnecting the plurality of first level routers so that each one of the routers in a first cluster is connected to all other clusters through one or more metarouters.  
   
     
     
         2 . The massively parallel processing system of  claim 1  wherein each one of the clusters is a two-dimensional hypercube.  
     
     
         3 . The massively parallel processing system of  claim 1  wherein each one of the metarouters are eight port routers.  
     
     
         4 . The massively parallel processing system of  claim 1  wherein each one of the metarouters are four port routers.  
     
     
         5 . The massively parallel processing system of  claim 1  wherein each one of the processing element nodes comprises four processors.  
     
     
         6 . A massively parallel processing system comprising: 
 a plurality of processors;    a first set of routers for interconnecting the plurality of processors as two-dimensional hypercubes; and    a second set of routers for interconnecting the first set of routers wherein the hypercubes remain in tack as the system is expanded.

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