Device and method for signal processing

Abstract

The present invention relates to a signal processor and methods of using a signal processor. In one aspect, the present invention relates to a signal processor that includes a pulse width modulator having a clock rate, and also includes a digital filter configured to receive an output of the pulse width modulator, wherein the digital filter samples the output at the clock rate to suppress the distortion. In another aspect, the present invention relates to a method including modulating a first pulse code modulated signal having a first resolution into a second pulse code modulated signal having a second resolution that is smaller than the first resolution. This aspect further includes modulating the second pulse code modulated signal into a third signal that includes a plurality of pulses in time having a clock rate, and filtering in a digital domain the plurality of pulses in time to suppress a distortion in the third signal.

1 . A signal processor, comprising: 
 a pulse width modulator having a clock rate; and    a digital filter configured to receive an output of said pulse width modulator,    wherein said output comprises a distortion, and wherein said digital filter samples said output at said clock rate to suppress said distortion.    
     
     
         2 . A digital signal processing circuit, comprising: 
 a pulse width modulator having an output with a distortion; and    means for sampling said output and suppressing said distortion in a digital domain.    
     
     
         3 . An integrated circuit chip configured to receive a pulse code modulated digital signal and to generate a pulse width modulated digital output signal, wherein said output signal has a distortion, and wherein said distortion is suppressed by a digital filter that operates at at least a clock rate of said pulse width modulated digital signal.