Method of manufacturing semiconductor integrated circuit device, and semiconductor integrated circuit device made by its method

Abstract

Mutual diffusion of impurities in a gate electrode is suppressed near a boundary between an n-channel type MISFET and a p-channel type MISFET, which adopt a polycide's dual-gate structure. Since a gate electrode of an n-channel type MISFET and a gate electrode of a p-channel type MISFET are of mutually different conductivity types, they are separated to prevent the mutual diffusion of the impurities and are electrically connected to each other via a metallic wiring formed in the following steps. In a step before a gate electrode material is patterned to separate the gate electrodes, the mutual diffusion of the impurities before forming the gate electrodes is prevented by performing no heat treatment at a temperature of 700° C. or higher.

1 . A method of manufacturing a semiconductor integrated circuit device, including n-channel type and a p-channel type MISFETs over a semiconductor substrate, the method comprising the steps of: 
 (a) forming a gate dielectric film over a main surface of-said semiconductor substrate, and thereafter forming a silicon film over said gate dielectric film;    (b) introducing a plurality of kinds of impurities into said silicon film, and thereby defining one portion of said silicon film as a n-type silicon film and the other portion as a p-type silicon film;    (c) forming, above each of said n-type silicon film and said p-type silicon film, a conductive film including metal as a main component;    (d) patterning said conductive film, said n-type silicon film, and said p-type silicon film after said step (c), and thereby forming a gate electrode of n-channel type MISFET, comprised of a laminated film of said n-type silicon film and said conductive film, and forming a gate electrode of p-channel type MISFET, comprised of a laminated film of said p-type silicon film and said conductive film; and    (e) performing a heat treatment of said semiconductor substrate at a temperature of 700° C. or higher after said step (d),    wherein a circuit is formed over the semiconductor substrate includes a memory circuit of a Dynamic Random Access Memory and a processor,    the memory circuit has a memory cell of said Dynamic Random Access Memory including a said n-channel type MISFET, and    the processor includes a said n-channel type MISFET and a said p-channel type MISFET.    
     
     
         2 - 18 . (canceled)  
     
     
         19 . The method according to  claim 1 , further comprising the steps of: after said step (e), 
 (f) forming a dielectric film over said semiconductor substrate so as to cover said gate electrodes, and forming a connection hole in said dielectric film above said gate electrodes; and    (g) forming a wiring above said dielectric film, and electrically connecting said wiring and said gate electrodes through said connection hole.    
     
     
         20 . The method according to  claim 1 , 
 wherein said wiring includes a wiring for electrically connecting said gate electrode of n-channel type MISFET and said gate electrode of p-channel type MISFET.    
     
     
         21 . The method according to  claim 1 , further comprising the step of: after said step (d) and before said step (e), 
 introducing a plurality of kinds of impurities into said semiconductor substrate, and thereby forming source and drain regions of said n-channel type MISFET and source and drain regions of said p-channel type MISFET.    
     
     
         22 . The method according to  claim 1 , further comprising the step of: after said step (c) and before said step (d), 
 performing a heat treatment of said semiconductor substrate at a temperature of 700° C. or lower.    
     
     
         23 . The method according to  claim 1 , 
 wherein said conductive film includes a tungsten-nitride film and a tungsten film formed over said tungsten-nitride film.