MOSFET using gate work function engineering for switching applications

Abstract

This invention discloses a new MOSFET device. The MOSFET device has an improved operation characteristic achieved by manufacturing a MOSFET with a higher gate work function by implementing a P-doped gate in an N-MOSFET device. The P-type gate increases the threshold voltage and shifts the C-Vds characteristics. The reduced Cgd thus achieves the purpose of suppressing the shoot through and resolve the difficulties discussed above. Unlike the conventional techniques, the reduction of the capacitance Cgd is achieved without requiring complicated fabrication processes and control of the recess electrode.

1 . A metal oxide semiconductor field effect transistor (MOSFET) device comprising: 
 a trenched gate filled with a gate material doped with a dopant to adjust said work function for increasing a threshold voltage of said MOSFET device.    
   
   
       2 . The MOSFET device of  claim 1  wherein: 
 said MOSFET is a N-channel MOSFET and said trenched gate is filled with a P-doped gate material.    
   
   
       3 . The MOSFET device of  claim 1  wherein: 
 said MOSFET is a P-channel MOSFET and said trenched gate is filled with a N-doped gate material.    
   
   
       4 . The MOSFET device of  claim 1  wherein: 
 said MOSFET comprising a channel of a first conductivity type and said trenched gate is filled with a second conductivity gate material.    
   
   
       5 . The MOSFET device of  claim 1  wherein: 
 said trenched gate filled with a gate material having a work function higher than an N+ poly for a n-channel MOSFET or lower than a P+ poly for a P-channel MOSFET.    
   
   
       6 . The MOSFET device of  claim 1  wherein: 
 said trenched gate material further reducing a Vgs spike in response to an dVds/dT by adjusting said work function wherein said Vgs representing a gate-drain voltage and said dVds/dT representing a rate of change of a drain-to-source voltage over time.    
   
   
       7 . The MOSFET device of  claim 1  wherein: 
 said trenched gate material further shifting a C-V characteristic curve representing a gate-to-drain capacitance (Cgd) as a function of drain-to-source voltage (Vds) for reducing said Cgd by adjusting said work function.    
   
   
       8 . The MOSFET device of  claim 5  wherein: 
 said gate has a gradient distribution of dopant concentration.    
   
   
       9 . The MOSFET device of  claim 2  wherein: 
 said gate material trench further comprising a p-type polysilicon having a dopant concentration up to 10 22 /cm 3      
   
   
       10 . The MOSFET device of  claim 1  wherein: 
 said gate material further comprising a polycide.    
   
   
       11 . The MOSFET device of  claim 1  wherein: 
 said gate material comprising a tungsten gate material.    
   
   
       12 . The MOSFET device of  claim 2  wherein: 
 said gate material comprising a platinum silicide gate material.    
   
   
       13 . The MOSFET device of  claim 8  wherein: 
 the gate has a highest dopant concentration at the top and the lowest dopant concentration at the bottom.    
   
   
       14 . A method for manufacturing a metal oxide semiconductor field effect transistor (MOSFET) device comprising: 
 filling a trenched gate with a gate material having a work function higher than an N+ poly for a n-channel MOSFET and lower than a P+ poly for a P-channel MOSFET.    
   
   
       15 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a P-doped gate material for an N-channel MOSFET.    
   
   
       16 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a N-doped gate material for a P-channel MOSFET.    
   
   
       17 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a gate material of a first conductivity type gate material for a second conductivity type MOSFET.    
   
   
       18 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a gate material for increasing a threshold voltage of said MOSFET device.    
   
   
       19 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a gate material for reducing a Vgs spike in response to an dVds/dT by adjsuting said work function wherein said Vgs representing a gate-drain voltage and said dVds/dT representing a rate of change of a drain-to-source voltage over time.    
   
   
       20 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a gate material for shifting a C-V characteristic curve representing a gate-to-drain capacitance (Cgd) as a function of drain-to-source voltage (Vds) for reducing said Cgd by adjusting said work function.    
   
   
       21 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a P-type polysilicon gate material having a dopant concentration up  10   22 /cm 3 .    
   
   
       22 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a polycide    
   
   
       23 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a tungsten gate material.    
   
   
       24 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a silicide gate material.    
   
   
       25 . The method of  claim 14  wherein: 
 said step of filling said trenching gate comprising a step of filling said trenched gate with a gate material of a first conductivity type gate material for a second conductivity type MOSFET and wherein said gate material having a vertically gradient dopant concentration.