US2006269745A1PendingUtilityA1
Nano wires and method of manufacturing the same
Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Feb 25, 2005Filed: Feb 27, 2006Published: Nov 30, 2006
Est. expiryFeb 25, 2025(expired)· nominal 20-yr term from priority
H10W 10/181H10P 90/1908H10P 30/209H10P 14/6306H10P 76/204Y10T428/2913B82Y 40/00H10H 20/819H10P 14/60
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Claims
Abstract
The present invention provides a method of manufacturing nano wires and nano wires having a p-n junction structure. The method includes: stacking a mask layer on a substrate; patterning the mask layer into stripes; and performing an oxygen ion injection process on the substrate and the mask layer to form oxygen ion injection regions in the substrate, thereby forming nano wire regions embedded in the substrate and separated from the substrate by the oxygen ion injection regions.
Claims
exact text as granted — not AI-modified1 . A method of manufacturing nano wires, the method comprising:
stacking a mask layer on a substrate, and patterning the mask layer into stripes; and performing an oxygen ion injection process on the substrate and the mask layer to form oxygen ion injection regions in the substrate, thereby forming nano wire regions embedded in the substrate and separated from the substrate by the oxygen ion injection regions.
2 . The method of claim 1 , wherein the stacking of the mask layer comprises:
forming a photoresist layer by coating a photoresist on top of the substrate, and the patterning the mask layer into stripes comprises: patterning the photoresist layer; and performing a thermal process on the patterned photoresist later to form the mask layer.
3 . The method of claim 1 , wherein the stacking of the mask layer comprises:
forming a photoresist layer by coating a photoresist on top of the substrate; and the patterning the mask layer into stripes comprises: and patterning the photoresist layer by placing a striped grating over the photoresist layer and emitting a laser thereon.
4 . The method of claim 1 , further comprising: controlling the sizes of the nano wires by performing an oxidizing process on a surface of the substrate and the nano wire regions to form an oxidation layer on the surface of the substrate and the nano wire regions.
5 . The method of claim 1 , wherein the substrate is a silicon substrate.
6 . A method of manufacturing nano wires having a p-n junction structure, the method comprising:
stacking a mask layer on top of a substrate doped with a first impurity, and patterning the mask layer into stripes; performing an oxygen ion injection process on the substrate and the mask layer to form oxygen ion injection regions in the substrate, thereby forming nano wire regions embedded in the substrate and separated from the substrate by the oxygen ion injection regions; and forming a second impurity region contacting a first impurity region in each of the nano wires by disposing a third mask layer over some regions of the substrate and the mask layer and doping with a second impurity.
7 . The method of claim 1 , wherein the stacking of the mask layer comprises:
forming a photoresist layer by coating a photoresist on top of the substrate, and the patterning the mask layer into stripes comprises: patterning the photoresist layer; and performing a thermal process on the patterned photoresist later to form the mask layer.
8 . The method of claim 1 , wherein the stacking of the mask layer comprises:
forming a photoresist layer by coating a photoresist on top of the substrate; and the patterning the mask layer into stripes comprises: patterning the photoresist layer by placing a striped grating over the photoresist layer and emitting a laser thereon; and performing a thermal process on the patterned photoresist layer to form the mask layer.
9 . The method of claim 6 , further comprising forming a first electrode contacting the first impurity region and a second electrode contacting the second impurity region by spreading a conductive material on the substrate after removing the mask layer.
10 . A nano wire structure comprising:
a substrate; nano wires formed in stripes in the substrate; and oxygen ion injection regions formed at a border between the substrate and the nano wires to separate the substrate and the nano wires.
11 . The nano wires of claim 10 , wherein the substrate and the nano wires are made of silicon.
12 . Nano wires having a p-n junction structure, the nano wires comprising:
a substrate doped with a first impurity; nano wires formed in stripes in the substrate with first and second impurity regions; oxygen ion injection regions formed at a border between the substrate and the nano wires to separate the substrate and the nano wires; and a first electrode that contacts the first impurity region and is formed on the substrate, and a second electrode that contacts the second impurity region and is formed on the substrate.
13 . The nano wires of claim 12 , wherein the substrate and the nano wires are made of silicon.Join the waitlist — get patent alerts
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