Semiconductor device, semiconductor device manufacturing method, and semiconductor device test method

Abstract

A semiconductor device manufacturing method includes forming a first layer and a second layer being different from the first layer, the first layer having a plurality of first test elements, the second layer having a plurality of pads, and adhering the first and second layers to electrically connect the first test elements to the pads.

1 . A semiconductor device manufacturing method comprising: 
 forming a first layer and a second layer being different from the first layer, the first layer having a plurality of first test elements, the second layer having a plurality of pads; and    adhering the first and second layers to electrically connect the first test elements to the pads.    
   
   
       2 . The method according to  claim 1 , further comprising: 
 respectively forming a plurality of bumps on the pads in forming the second layer;    forming a third layer having solder balls separately from formation of the first and second layers; and    after adhering the first and second layers, adhering the second and third layers to electrically connect the first test elements to the solder balls via the bumps.    
   
   
       3 . The method according to  claim 1 , wherein all the first test elements are of the same type.  
   
   
       4 . The method according to  claim 1 , wherein the first test elements are formed in a first line.  
   
   
       5 . The method according to  claim 1 , wherein in forming the first layer, a plurality of second test elements which are electrically insulated from the pads are formed in the first layer.  
   
   
       6 . The method according to  claim 5 , wherein all the second test elements are of the same type.  
   
   
       7 . The method according to  claim 5 , wherein the second test elements are of a type different from the first test elements.  
   
   
       8 . The method according to  claim 5 , wherein the first test elements are formed in a first line, and the second test elements are formed in a second line different from the first line.  
   
   
       9 . The method according to  claim 5 , wherein the second test elements are formed in the first layer below the pads.  
   
   
       10 . The method according to  claim 1 , further comprising: 
 forming in the first layer a first connection member which is connected to the first test elements in forming the first layer; and    forming in the second layer a second connection member which is connected to the pads and the first connection member in forming the second layer.    
   
   
       11 . The method according to  claim 2 , further comprising: 
 forming in the first layer a first connection member which is connected to the first test elements in forming the first layer;    forming in the second layer a second connection member which is connected to the pads and the first connection member in forming the second layer; and    forming in the third layer a third connection member which is connected to the bumps and the solder balls in forming the third layer.    
   
   
       12 . A semiconductor device test method comprising: 
 forming a first layer and a second layer being different from the first layer, the first layer having a plurality of first test elements, the second layer having a plurality of pads;    adhering the first and second layers to electrically connect at least some of the test elements to the pads; and    evaluating performance of said at least some of the test elements.    
   
   
       13 . The method according to  claim 12 , further comprising: 
 respectively forming a plurality of bumps on the pads in forming the second layer;    forming a third layer having solder balls separately from formation of the first and second layers; and    after adhering the first and second layers, adhering the second and third layers to electrically connect said at least some of the test elements to the solder balls via the bumps.    
   
   
       14 . The method according to  claim 12 , wherein test elements of the same type are formed in a line.  
   
   
       15 . The method according to  claim 14 , wherein test elements of the same type are evaluated.