US2006264068A1PendingUtilityA1

Method for fabricating semiconductor device and semiconductor substrate

Assignee: MATSUSHITA ELECTRIC INDUSTRIAL CO LTDPriority: Jul 29, 2003Filed: Jul 28, 2006Published: Nov 23, 2006
Est. expiryJul 29, 2023(expired)· nominal 20-yr term from priority
Inventors:Kenji Yoneda
H10D 64/01344H10P 36/20H10D 64/0134H10D 64/693
46
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A first thermal treatment, which is performed at a temperature within 650-750° C. for 30-240 minutes, and thereafter a second thermal treatment, which is performed at a temperature within 900-1100° C. for 30-120 minutes, are performed as the initial thermal treatments on a semiconductor wafer composed of silicon. Further, before forming a gate insulating film, the temperature is increased to 1000° C. at a temperature increasing rate of 8° C./min in a nitrogen ambient, and a thermal treatment is performed at a temperature of 1000° C. for 30 minutes as a third thermal treatment.

Claims

exact text as granted — not AI-modified
1 . A method for fabricating a semiconductor device comprising the steps of: 
 (a) performing a first thermal treatment at a temperature within 650-750° C. for 30-240 minutes; and    (b) after the step (a), performing a second thermal treatment at a temperature within 900-1100° C. for 30-120 minutes,    wherein the first and the second thermal treatments are the initial thermal treatments performed on a semiconductor substrate composed of silicon after the semiconductor substrate is introduced into a fabricating process.    
   
   
       2 . The method of  claim 1 , 
 wherein the first thermal treatment and the second thermal treatment are both performed at a temperature increasing rate between 1-8° C./min, and a temperature decreasing rate between 1-60° C./min.    
   
   
       3 . The method of  claim 1  further comprises steps, 
 (c) after the step (b), performing a third thermal treatment on the semiconductor substrate such that metal impurities are diffused to gettering sites, and    (d) after the step (c), forming a gate insulating film on the principal surface of the semiconductor substrate.    
   
   
       4 . The method of  claim 3 , 
 wherein in the step (c), gettering sites composed of a bulk microdefect (BMD) layer are formed at a depth of 1-10 μm from the surface of the semiconductor substrate by the third thermal treatment, and    the concentration of the gettering sites is between 5×10 8  cm −3  and 5×10 10  cm −3 , inclusively.    
   
   
       5 . The method of  claim 3 , 
 wherein thermal budgets in the first thermal treatment, the second thermal treatment and the third thermal treatment are set within a range that maintains the characteristics of the semiconductor device.    
   
   
       6 . A method for fabricating a semiconductor device comprising the steps of: 
 (a) forming a gate insulating film on the principal surface of a semiconductor substrate composed of silicon; and    (b) before forming the gate insulating film, performing a thermal treatment on the semiconductor substrate such that metal impurities are diffused to gettering sites.    
   
   
       7 . The method of  claim 6 , 
 wherein gettering sites composed of a bulk microdefect (BMD) layer are formed at a depth of 1-10 μm from the surface of the semiconductor substrate by the thermal treatment, and    the concentration of the gettering sites is between 5×10 8  cm −3  and 5×10 10  cm −3 , inclusively.    
   
   
       8 - 11 . (canceled)

Join the waitlist — get patent alerts

Track US2006264068A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.