US2006261485A1PendingUtilityA1
Combined barrier layer and seed layer
Est. expiryApr 19, 2021(expired)· nominal 20-yr term from priority
Inventors:Dinesh Chopra
H10W 20/052H10W 20/043H10W 20/033H10W 20/031H10P 14/47
50
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Claims
Abstract
Apparatus with conductive interconnect layers disposed on a dual-purpose layer provide useful articles such as semiconductor wafers, semiconductor dies, memory devices, circuit modules, and electronic systems. The number of necessary processing steps to form such conductive interconnects are reduced by removing the need to employ a seed layer interposed between the barrier layer and the conductive interconnect layer.
Claims
exact text as granted — not AI-modified1 . An electronic apparatus comprising:
a substrate; a dual-purpose layer on the substrate; and a conductive interconnect layer disposed on and contacting the dual-purpose layer.
2 . The electronic apparatus of claim 1 , wherein the dual-purpose layer contains tungsten.
3 . The electronic apparatus of claim 1 , wherein the dual-purpose layer is tungsten, tungsten nitride, or tungsten-silicon nitride.
4 . The electronic apparatus of claim 1 , wherein the substrate includes silicon-on-sapphire.
5 . The electronic apparatus of claim 1 , wherein the conductive interconnect layer includes copper.
6 . The electronic apparatus of claim 1 , wherein the electronic apparatus includes a semiconductor wafer.
7 . A semiconductor die comprising:
an individual pattern on a substrate, the individual pattern containing integrated circuit device, the integrated circuit device including:
a dual-purpose layer; and
a conductive interconnect layer electrochemically disposed on and contacting the dual-purpose layer.
8 . The semiconductor die of claim 7 , wherein the dual-purpose layer contains tungsten.
9 . The semiconductor die of claim 7 , wherein the dual-purpose layer is tungsten, tungsten nitride, or tungsten-silicon nitride.
10 . The semiconductor die of claim 7 , wherein the substrate includes silicon-on-insulator.
11 . The semiconductor die of claim 7 , wherein the conductive interconnect layer includes a conductive alloy.
12 . A memory device, comprising:
an address decoder; row access circuitry; column access circuitry; control circuitry; an input output circuit; and an array of memory cells, the array disposed on a substrate, wherein a memory cell includes:
a dual-purpose layer on the substrate; and
a conductive interconnect layer disposed on and contacting the dual-purpose layer.
13 . The memory device of claim 12 , wherein the dual-purpose layer contains tungsten.
14 . The memory device of claim 12 , wherein the dual-purpose layer is tungsten, tungsten nitride, or tungsten-silicon nitride.
15 . The memory device of claim 12 , wherein the memory device includes a dielectric layer contacting the dual-purpose layer, the dielectric layer disposed between the dual-purpose layer and the substrate.
16 . The memory device of claim 12 , wherein the conductive interconnect layer includes copper.
17 . A circuit module comprising:
a plurality of semiconductor dies, wherein one or more of the semiconductor dies includes:
a substrate;
a dual-purpose layer on the substrate; and
a conductive interconnect layer disposed on and contacting the dual-purpose layer.
18 . The circuit module of claim 17 , wherein the dual-purpose layer contains tungsten.
19 . The circuit module of claim 17 , wherein the dual-purpose layer is tungsten, tungsten nitride, or tungsten-silicon nitride.
20 . The circuit module of claim 17 , wherein the semiconductor die includes an insulating oxide layer contacting the dual-purpose layer, the insulating oxide layer disposed between the dual-purpose layer and the substrate.
21 . The circuit module of claim 17 , wherein the conductive interconnect layer includes a copper alloy.
22 . An electronic system comprising:
one or more circuit modules; and a user interface coupled to one of the circuit modules, wherein at least one of the circuit modules having a semiconductor die, the semiconductor die including:
a substrate;
a dual-purpose layer on the substrate; and
a conductive interconnect layer disposed on and contacting the dual-purpose layer.
23 . The electronic system of claim 22 , wherein the dual-purpose layer contains tungsten.
24 . The electronic system of claim 22 , wherein the dual-purpose layer is tungsten, tungsten nitride, or tungsten-silicon nitride.
25 . The electronic system of claim 22 , wherein the substrate includes a silicon substrate.
26 . The electronic system of claim 22 , wherein the conductive interconnect layer includes a conductive alloy.Join the waitlist — get patent alerts
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