US2006253808A1PendingUtilityA1

Library of cells for use in designing sets of domino logic circuits in a standard cell library, or the like, and method for using same

Assignee: ST MICROELECTRONICS INCPriority: Jul 10, 2003Filed: May 30, 2006Published: Nov 9, 2006
Est. expiryJul 10, 2023(expired)· nominal 20-yr term from priority
Inventors:Thomas Zounes
H10D 84/907H10D 89/10
41
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Claims

Abstract

A cell library for designing integrated domino circuits has a first library portion with a plurality of selectable logic circuits having different transistor sizes and/or logic functions for selection according to desired logic function and parametric characteristics. A second library portion includes a plurality of selectable prechargeable driver circuits. Each of the driver circuits is configured to be connectable to an output of a selected one of the logic circuits. The driver circuits also have at least different transistor sizes. Standard FET devices may be constructed to precharge the output node of the selected logic circuit in the design of a domino logic circuit.

Claims

exact text as granted — not AI-modified
1 . A method for constructing an integrated circuit, comprising: 
 selecting a logic circuit from a cell library containing a plurality of logic circuits; and    selecting a driver circuit from said cell library containing a plurality of driver circuits for connection to said selected logic circuit to match at least a size characteristic of said selected logic circuits.    
   
   
       2 . The method of  claim 1  wherein said selecting a logic circuit comprises selecting an NMOS logic circuit.  
   
   
       3 . The method of  claim 2  further comprising constructing a PMOS transistor for connection to said selected logic circuit to precharge same in a domino logic circuit.  
   
   
       4 . The method of  claim 1  further comprising selecting a keeper circuit that inverts an output from said selected NMOS circuit and latches a logic value therein.

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