Semiconductor integrated circuit device which executes data transfer between a plurality of devices connected over network, and data transfer method

Abstract

A semiconductor integrated circuit device includes a first semiconductor device and a second semiconductor device, first and second buffer circuits, a data bus, and a control circuit. The semiconductor integrated circuit device executes data transmission/reception between the first and second semiconductor devices. The first and second buffer circuits store data. The data bus transmits the data between the first and second buffer circuits. The first semiconductor device reads out the transfer data into the first buffer circuit. The control circuit transfers the transfer data, which is stored in the first buffer circuit, to the second buffer circuit via the data bus. The control circuit acquires a right of use of the data bus after the first semiconductor device writes the transfer data into the first buffer circuit, and disclaims the right of use of the data bus after the transfer data is transferred to the second buffer circuit.

1 . A semiconductor integrated circuit device which includes a first semiconductor device and a second semiconductor device and executes data transmission/reception between the first and second semiconductor devices, comprising: 
 first and second buffer circuits which store data;    a data bus which transmits the data between the first and second buffer circuits;    the first semiconductor device which reads out the transfer data into the first buffer circuit in a case where the first buffer circuit includes an empty area at a time of transferring the data;    a control circuit which transfers the transfer data, which is stored in the first buffer circuit, to the second buffer circuit via the data bus in a case where the second buffer circuit includes an empty area at the time of transferring the data, the control circuit acquiring a right of use of the data bus after the first semiconductor device writes the transfer data into the first buffer circuit, and disclaiming the right of use of the data bus after the transfer data is transferred to the second buffer circuit; and    the second semiconductor device which reads out the transfer data transferred to the second buffer circuit.    
   
   
       2 . A semiconductor integrated circuit device which includes a plurality of semiconductor devices, comprising: 
 a first buffer circuit provided in association with each of the plurality of semiconductor devices, transfer data being read out from the associated semiconductor device into the first buffer circuit when the associated semiconductor device functions as a transfer-source semiconductor device;    a second buffer circuit provided in association with each of the plurality of semiconductor devices, the transfer data being transferred and written in the second buffer circuit when the associated semiconductor device functions as a transfer-destination semiconductor device;    a data bus which transmits the transfer data between the semiconductor devices; and    a control circuit which acquires a right of use of the data bus when the transfer data is read out into the first buffer circuit, transfers the transfer data via the data bus to the second buffer circuit associated with the semiconductor device functioning as the transfer-destination semiconductor device, and disclaims the right of use of the data bus after the transfer of the transfer data is completed.    
   
   
       3 . The device according to  claim 2 , wherein at the time of the data transfer, the control circuit outputs a read-out request instruction, which requests read-out of the transfer data to the first buffer circuit, to the semiconductor device functioning as the transfer-source semiconductor device, 
 the semiconductor device functioning as the transfer-source semiconductor device reads out the transfer data to the first buffer circuit in response to the read-out request instruction, and returns an acknowledge signal to the control circuit after completion of the read-out, and    the control circuit acquires the right of use of the data bus in response to the acknowledge signal.    
   
   
       4 . The device according to  claim 3 , wherein in a case where the first buffer circuit associated with the semiconductor device functioning as the transfer-source semiconductor device includes an empty area, the control circuit outputs the read-out request instruction to the semiconductor device.  
   
   
       5 . The device according to  claim 3 , wherein in a case where the second buffer circuit associated with the semiconductor device functioning as the transfer-destination semiconductor device includes an empty area, the control circuit transfers the transfer data to the second buffer circuit.  
   
   
       6 . The device according to  claim 2 , wherein at the time of the data transfer, the control circuit outputs a plurality of read-out request instructions, each of which request read-out of the transfer data to the first buffer circuit, to the semiconductor device functioning as the transfer-source semiconductor device, 
 the semiconductor device functioning as the transfer-source semiconductor device reads out the transfer data to the first buffer circuit in response to the read-out request instruction, and returns an acknowledge signal to the control circuit after completion of the read-out,    the control circuit acquires the right of use of the data bus in response to the acknowledge signal,    the semiconductor device functioning as the transfer-source semiconductor device stores a plurality of the read-out request instructions, and    the semiconductor device functioning as the transfer-source semiconductor device reads out the transfer data into the first buffer circuit in an order different from an order in which the read-out request instructions are received.    
   
   
       7 . The device according to  claim 2 , wherein the first buffer circuit includes a plurality of entries which stores the transfer data, and 
 the control circuit transfers the transfer data to the second buffer circuit in an order different from an order in which the transfer data are stored in the first buffer circuit.    
   
   
       8 . The device according to  claim 7 , wherein the control circuit preferentially transfers the transfer data, for which an empty area is available in the second buffer associated with the semiconductor device functioning as the transfer-destination device, to the second buffer circuit.  
   
   
       9 . The device according to  claim 2 , wherein the semiconductor device functioning as the transfer-source semiconductor device outputs to the control circuit a transfer request instruction for transfer of the transfer data to the semiconductor device functioning as the transfer-destination semiconductor device when the semiconductor device functioning as the transfer-source semiconductor device writes the transfer data in the first buffer circuit, and 
 the control circuit transfers the transfer data to the semiconductor device functioning as the transfer-destination semiconductor device in accordance with the transfer request instruction.    
   
   
       10 . The device according to  claim 9 , wherein the control circuit transfers the transfer data, for which an empty area is available in the second buffer associated with the semiconductor device functioning as the transfer-destination device, to the second buffer circuit.  
   
   
       11 . The device according to  claim 2 , wherein the semiconductor device functioning as the transfer-destination device reads out the transfer data after the transfer data is written in the associated second buffer circuit.  
   
   
       12 . The device according to  claim 11 , wherein the second buffer circuit includes a plurality of entries which stores the transfer data, and 
 the semiconductor device functioning as the transfer-destination semiconductor device reads out the transfer data in an order different from an order in which the transfer data are stored in the second buffer circuit.    
   
   
       13 . The device according to  claim 2 , wherein the control circuit includes: 
 a request table which stores information relating to an empty/non-empty state of the first buffer circuit of the semiconductor device functioning as the transfer-source semiconductor device, and information relating to an empty/non-empty state of the second buffer circuit of the semiconductor device functioning as the transfer-destination semiconductor device; and    an arbiter which determines between which of the semiconductor devices the data transfer is to be executed, in accordance with the information in the request table.    
   
   
       14 . The device according to  claim 2 , wherein the data bus has an interconnection-type network architecture which includes transmission lines associated with all combinations of the semiconductor devices.  
   
   
       15 . The device according to  claim 2 , wherein the first and second buffer circuits are made of an embedded DRAM.  
   
   
       16 . A data transfer method for data transfer between a first semiconductor device and a second semiconductor device, which are connected over a data bus, comprising: 
 causing the first semiconductor device, which functions as a transfer-source semiconductor device, to read out transfer data into a first buffer circuit;    causing a control circuit to confirm completion of the read-out of the transfer data into the first buffer circuit, and to acquire a right of use of the data bus;    causing the control circuit to transfer the transfer data, which is stored in the first buffer circuit, to a second buffer circuit via the data bus;    causing the control circuit to disclaim the right of use of the data bus after the transfer of the transfer data;    causing the second semiconductor device to read out the transfer data transferred to the second buffer circuit.    
   
   
       17 . The method according to  claim 16 , wherein while the control circuit acquires a right of use of the data bus and transfers the transfer data to the second buffer circuit, the first semiconductor device functioning as the transfer-source semiconductor device reads out the transfer data, which is to be transferred next, into the first buffer circuit.  
   
   
       18 . The method according to  claim 17 , wherein while the second semiconductor device reads out the transfer data, the control circuit acquires the right of use of the data bus in connection with the transfer data which is to be transferred next, and transfer the transfer data to the second buffer.  
   
   
       19 . The method according to  claim 16 , further comprising: 
 confirming an empty/non-empty state of the first buffer circuit; and    confirming an empty/non-empty state of the second buffer circuit,    wherein the first semiconductor device reads out the transfer data to the first buffer circuit in a case where an empty area is available in the first buffer circuit, and    the control circuit transfers the data in the first buffer circuit to the second buffer circuit in a case where an empty area is available in the second buffer circuit.    
   
   
       20 . The method according to  claim 19 , further comprising: 
 storing information relating to the empty/non-empty state of the first buffer circuit in a request table; and    storing information relating to the empty/non-empty state of the second buffer circuit in the request table,    wherein on the basis of the information in the request table, the control circuit instructs the first semiconductor device to execute read-out of the transfer data into the first buffer circuit, and transfers the data to the second buffer circuit from the first buffer circuit.