US2006249723A1PendingUtilityA1

Planarization process for semiconductor substrates

51
Individually held — no corporate assignee on recordPriority: May 23, 1997Filed: Jul 11, 2006Published: Nov 9, 2006
Est. expiryMay 23, 2017(expired)· nominal 20-yr term from priority
Inventors:Trung T. DoanGuy T. BlalockMark DurcanScott Meikle
H10P 95/062H10P 50/00
51
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Claims

Abstract

A method of manufacturing semiconductor devices using an improved chemical mechanical planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved chemical mechanical planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer filling in between the surface irregularities prior to the planarization of the surface through a chemical mechanical planarization process.

Claims

exact text as granted — not AI-modified
1 . A wafer comprising: 
 a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.    
   
   
       2 . The wafer of  claim 1 , further comprising: 
 solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.    
   
   
       3 . The wafer of  claim 1 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.  
   
   
       4 . A wafer in a chemical mechanical planarization process comprising: 
 a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.    
   
   
       5 . The wafer in a chemical mechanical planarization process of  claim 4 , further comprising: 
 solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.    
   
   
       6 . The wafer in a chemical mechanical planarization process of  claim 4 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.  
   
   
       7 . A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising: 
 a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.    
   
   
       8 . The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process of  claim 7 , further comprising: 
 solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.    
   
   
       9 . The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process of  claim 7 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.  
   
   
       10 . A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising: 
 a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.    
   
   
       11 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 10 , further comprising: 
 solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.    
   
   
       12 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 10 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.  
   
   
       13 . A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising: 
 a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.    
   
   
       14 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 13 , further comprising: 
 solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.    
   
   
       15 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 13 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.  
   
   
       16 . A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a planarization process comprising: 
 a wafer substrate having a substantially planar surface thereon formed during a planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.    
   
   
       17 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 16 , further comprising: 
 solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.    
   
   
       19 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 16 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.  
   
   
       20 . A wafer comprising: 
 a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.    
   
   
       21 . The wafer of  claim 20 , further comprising: 
 solidifying the material while applying pressure to the object as the object contacts the material.    
   
   
       22 . The wafer of  claim 20 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.  
   
   
       23 . A wafer in a chemical mechanical planarization process comprising: 
 a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.    
   
   
       24 . The wafer in a chemical mechanical planarization process of  claim 23 , further comprising: 
 solidifying the material while applying pressure to the object as the object contacts the material.    
   
   
       25 . The wafer in a chemical mechanical planarization process of  claim 23 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the deformable material.  
   
   
       26 . A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising: 
 a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.    
   
   
       27 . The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process of  claim 26 , further comprising: 
 solidifying the material while applying pressure to the object as the object contacts the material.    
   
   
       28 . The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process of  claim 26 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the deformable material.  
   
   
       29 . A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising: 
 a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the deformable material using a chemical mechanical planarization process.    
   
   
       30 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 29 , further comprising: 
 solidifying the material while applying pressure to the object as the object contacts the material.    
   
   
       31 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 29 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.  
   
   
       32 . A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising: 
 a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.    
   
   
       33 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 32 , further comprising: 
 solidifying the material while applying pressure to the object as the object contacts the material.    
   
   
       34 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 33 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.  
   
   
       35 . A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising: 
 a wafer having a surface thereon formed during a planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.    
   
   
       36 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 35 , further comprising: 
 solidifying the material while applying pressure to the object as the object contacts the material.    
   
   
       37 . The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of  claim 35 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.  
   
   
       38 . A semiconductor device comprising: 
 a portion of a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.    
   
   
       39 . The semiconductor device of  claim 38 , further comprising: 
 solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.    
   
   
       40 . The semiconductor device of  claim 38 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.  
   
   
       41 . A semiconductor device comprising: 
 a portion of a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.    
   
   
       42 . The semiconductor device of  claim 41 , further comprising: 
 solidifying the material while applying pressure to the object as the object contacts the material.    
   
   
       43 . The semiconductor device  claim 41 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.  
   
   
       44 . An incomplete semiconductor device comprising: 
 a portion of a wafer having a substantially planar surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.    
   
   
       45 . The incomplete semiconductor device of  claim 44 , further comprising: 
 solidifying the material while applying pressure to the object as the object contacts the material.    
   
   
       46 . The incomplete semiconductor device of  claim 44 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.  
   
   
       47 . A semiconductor device in a manufacturing process comprising: 
 a portion of a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.    
   
   
       48 . The semiconductor device in a manufacturing process of  claim 47 , further comprising: 
 solidifying the material while applying pressure to the object as the object contacts the material.    
   
   
       49 . The semiconductor device in a manufacturing process of  claim 47 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.  
   
   
       50 . An incomplete semiconductor device in a manufacturing process comprising: 
 a portion of a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.    
   
   
       51 . The incomplete semiconductor device in a manufacturing process of  claim 50 , further comprising: 
 solidifying the material while applying pressure to the object as the object contacts the material.    
   
   
       52 . The incomplete semiconductor device in a manufacturing process of  claim 50 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.

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