US2006246702A1PendingUtilityA1

Non-solder mask defined (nsmd) type wiring substrate for ball grid array (bga) package and method for manufacturing such a wiring substrate

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Aug 23, 2003Filed: Jul 10, 2006Published: Nov 2, 2006
Est. expiryAug 23, 2023(expired)· nominal 20-yr term from priority
H05K 2203/0577H05K 3/3452H05K 2201/10734H05K 2203/058H05K 3/243H05K 2201/0989H10W 72/20H10W 72/00
51
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

In one embodiment, a pad is formed on a substrate surface. The pad is connected with a connecting pattern. A first mask is formed on the substrate. The first mask has a first opening exposing at least a portion of the pad and a portion of the connecting pattern. A second mask is formed on the first mask, The second mask has a second opening exposing at least a portion of the pad and a portion of the connecting pattern. A boundary surface or sidewall of the first opening is not coplanar with a boundary surface or sidewall of the second opening. Therefore, stresses may be prevented from concentrating on the boundary surface of the first opening, thereby allowing dispersion of the stresses and restraining pattern cracks.

Claims

exact text as granted — not AI-modified
1 . A manufacturing method comprising: 
 forming a pad on a substrate, the pad connected with a connecting pattern;    forming a first mask on the substrate, the first mask having a first opening exposing at least a portion of the pad and a portion of the connecting pattern; and    forming a second mask is formed on the first mask, the second mask having a second opening exposing at least a portion of the pad and a portion of the connecting pattern, wherein a boundary surface of the first opening is not coplanar with a boundary surface of the second opening.    
   
   
       2 . The method of  claim 1 , wherein the boundary surface of the first opening is covered by the second mask.  
   
   
       3 . The method of  claim 1 , wherein the second opening is smaller than the first opening.  
   
   
       4 . The method of  claim 1 , further comprising forming a plating layer on the exposed pad and connecting pattern.  
   
   
       5 . The method of  claim 4 , further comprising removing an oxidation film on the exposed pad and connecting pattern, before formation of the plating layer and after formation of the first mask.  
   
   
       6 . The method of  claim 5 , wherein removing comprises using an acid cleaning process.  
   
   
       7 . The method of  claim 4 , wherein forming the plating layer comprises: 
 forming a nickel plating layer on the exposed pad and connecting pattern; and    forming a gold plating layer on the nickel plating layer.    
   
   
       8 . The method of  claim 1 , wherein the distance between the first opening and the second opening is tens of μm to hundreds of μm.  
   
   
       9 . A manufacturing method comprising: 
 forming a pad on a package substrate, the pad electrically connected with a connecting pattern;    forming a first mask on the substrate, the first mask having a first opening exposing at least a portion of the pad and a portion of the connecting pattern; and    forming a second mask on the first mask, the second mask having a second opening exposing at least a portion of the pad and a portion of the connecting pattern, wherein the second opening is smaller than the first opening.    
   
   
       10 . The method of  claim 9 , wherein a boundary surface of the first opening is protected by the second mask.  
   
   
       11 . The method of  claim 9 , wherein a boundary surface of the first opening is not coplanar with a boundary surface of the second opening.

Join the waitlist — get patent alerts

Track US2006246702A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.