US2006246611A1PendingUtilityA1

Method of and apparatus for controlling probe tip sanding in semiconductor device testing equipment

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Sep 17, 2002Filed: Jun 28, 2006Published: Nov 2, 2006
Est. expirySep 17, 2022(expired)· nominal 20-yr term from priority
H10P 74/00G01R 27/205G01R 35/00G01R 1/06711G01R 3/00
45
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Claims

Abstract

In a method of and apparatus for controlling probe tip sanding in semiconductor device testing equipment, resistance values of pads of a probed chip are measured and stored. If a maximum resistance value among the stored resistance values is greater than a contact resistance reference value, a consecutive fail counting value and an accumulated fail counting value are increased. An automatic sanding command is generated to activate automatic sanding of a probe tip, when at least one of the consecutive fail counting value and the accumulated fail counting value is greater than a respective counting reference value. In this manner, false negative readings in the testing of semiconductor devices as the result of increased contact resistance between a probe tip and a pad in an EDS test are reduced and therefore device yield is improved.

Claims

exact text as granted — not AI-modified
1 . An apparatus for controlling probe tip sanding in semiconductor device testing equipment, said apparatus comprising: 
 a sanding mechanism for sanding probe tips of a probe card; and    a controller for measuring and storing resistance values of pads of a probed chip, and for increasing a consecutive fail counting value and an accumulated fail counting value when a maximum resistance value among the stored resistance values is greater than a contact resistance reference value, and for generating an automatic sanding command to activate the sanding mechanism, when at least one of the consecutive fail counting value and accumulated fail counting value is greater than a respective counting reference value.    
   
   
       2 . The apparatus of  claim 1  wherein the measuring and storing of resistance values of pads of a probed chip occurs at a wafer level.  
   
   
       3 . The apparatus of  claim 1 , further comprising counters connected to the controller, for increasing the consecutive fail counting value and the accumulated fail counting value.  
   
   
       4 . The apparatus of  claim 1 , wherein the contact resistance reference value is determined by: 
 accumulating the resistance values measured by a resistance value measure program and obtaining a mean value during a pad open/short test for at least one die; and    summing the mean value with an allowed resistance error value.    
   
   
       5 . The apparatus of  claim 1 , wherein said counting reference value corresponding to the consecutive fail counting value is determined statistically.  
   
   
       6 . The apparatus of  claim 1 , wherein said counting reference value corresponding to the accumulated fail counting value is determined statistically.

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