MOS Transistor Gates with Doped Silicide and Methods for Making the Same
Abstract
Semiconductor devices and fabrication methods are presented, in which transistor gate structures are created using doped metal silicide materials. Upper and lower metal silicides are formed above a gate dielectric, wherein the lower metal silicide is doped with n-type impurities for NMOS gates and with p-type impurities for PMOS gates, and wherein a silicon may, but need not be formed between the upper and lower metal silicides. The lower metal silicide can be deposited directly, or may be formed through reaction of deposited metal and poly-silicon, and the lower silicide can be doped by diffusion or implantation, before or after gate patterning.
Claims
exact text as granted — not AI-modified1 - 34 . (canceled)
35 . A transistor gate structure, comprising:
a gate dielectric formed above a semiconductor body; a first metal silicide on, and in direct physical contact with, the gate dielectric, the first metal silicide doped with substantially single polarity impurities and having a first metal component; and a second metal silicide having a metal component different from the first metal component, above the first metal silicide.
36 . (canceled)
37 . The gate structure of claim 35 , further comprising a silicon layer between the first and second metal silicides.
38 . The gate structure of claim 35 , wherein the first metal silicide comprises a refractory metal.
39 . The gate structure of claim 38 , wherein the refractory metal is one of molybdenum, tungsten, tantalum, and titanium.
40 . The gate structure of claim 38 , wherein the second metal silicide comprises nickel.
41 . The gate structure of claim 35 , wherein the second metal silicide comprises nickel.Join the waitlist — get patent alerts
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