Semiconductor device including air gap between semiconductor substrate and L-shaped spacer and method of fabricating the same

Abstract

A semiconductor device includes source/drain regions, a gate pattern disposed on the semiconductor substrate between the source/drain regions, and L-shaped spacers that are used as masks in the forming of the source/drain regions. The L-shaped spacers each include a vertical portion covering a side wall of the gate pattern, and a lateral portion extending from the bottom of the vertical portion over the source/drain region. Support portions interposed between the L-shaped spacers and the gate pattern support the lateral portions of the L-shaped spacers such that an air gap is defined between at least the lateral portions of the L-shaped spacers and the source/drain regions. The air gap minimizes the parasitic capacitance associated with the gate electrode of the semiconductor device.

1 . A method of fabricating a semiconductor device, comprising: 
 forming a gate pattern on a semiconductor substrate, wherein the gate pattern has opposite side walls;    forming a support layer, a spacer insulating layer and a sacrificial layer sequentially on the semiconductor substrate including over the gate pattern;    anisotropically etching the sacrificial layer, the spacer insulating layer, and the support layer so as to form L-shaped support patterns covering the side walls of the gate pattern and respective portions of the semiconductor substrate adjacent to the gate pattern, L-shaped spacers covering the L-shaped support patterns, and sacrificial patterns covering the L-shaped spacers, wherein the L-shaped spacers each include a vertical portion normal to the semiconductor substrate and a lateral portion extending laterally from the bottom of the vertical portion;    isotropically etching the L-shaped support patterns from between at least the lateral portions of the L-shaped spacers and the semiconductor substrate so as to form an air gap between the lateral portions of the L-shaped spacers and the semiconductor substrate; and    implanting ions into the semiconductor substrate, including using the gate pattern and the L-shaped spacers as ion implantation mask, so as to form source/drain regions in the semiconductor substrate adjacent the gate pattern.    
   
   
       2 . The method of fabricating a semiconductor device according to  claim 1 , wherein the support layer and the sacrificial layer are formed of the same material.  
   
   
       3 . The method of fabricating a semiconductor device according to  claim 2 , wherein the sacrificial pattern is removed during the etching of the L-shaped support pattern.  
   
   
       4 . The method of fabricating a semiconductor device according to  claim 1 , wherein said forming of the spacer insulating layer comprises forming an oxide layer on the support layer.  
   
   
       5 . The method of fabricating a semiconductor device according to  claim 4 , wherein said forming of the support layer comprises forming a polysilicon layer or a nitride layer on the semiconductor substrate.  
   
   
       6 . The method of fabricating a semiconductor device according to  claim 4 , wherein said forming of the support layer comprises forming a semi-insulating polysilicon layer on the semiconductor substrate.  
   
   
       7 . The method of fabricating a semiconductor device according to  claim 4 , wherein said forming of the sacrificial layer comprises forming a polysilicon layer or a nitride layer on the spacer insulating layer.  
   
   
       8 . The method of fabricating a semiconductor device according to  claim 1 , wherein said implanting of ions into the substrate comprises forming a respective lightly-doped source/drain region beneath the lateral portion of each of the L-shaped spacers and forming a highly-doped source/drain region contiguous to the lightly-doped source/drain region.  
   
   
       9 . The method of fabricating a semiconductor device according to  claim 1 , and further comprising forming a buffer insulating layer between the gate pattern and the support layer.  
   
   
       10 . A method of fabricating a semiconductor device, comprising: 
 forming a gate pattern on a semiconductor substrate, wherein the gate pattern has opposite side walls;    forming a buffer insulating layer on the semiconductor substrate including over the gate pattern, the buffer insulating layer being of a material having an etch selectivity with respect to the gate pattern;    forming a support layer, a spacer insulating layer and a sacrificial layer sequentially on the semiconductor substrate including over the gate pattern, wherein the support layer and the sacrificial layer are of the same material and have an etch selectivity with respect to the spacer insulating layer;    anisotropically etching the sacrificial layer, the spacer insulting layer, and the support layer so as to form L-shaped support patterns covering the side walls of the gate pattern and respective portions of the semiconductor substrate adjacent to the gate pattern, L-shaped spacers covering the L-shaped support patterns, and sacrificial patterns covering the L-shaped spacers, wherein the L-shaped spacers each include a vertical portion normal to the semiconductor substrate and a lateral portion extending laterally from the bottom of the vertical portion;    removing the sacrificial patterns, and isotropically etching the L-shaped support patterns so as to provide an air gap between at least the lateral portion of each of the L-shaped spacers and the semiconductor substrate; and    implanting ions into the semiconductor substrate, including using the gate pattern and the L-shaped spacers as an ion implantation mask, so as to form source/drain regions in the semiconductor substrate adjacent the gate pattern.    
   
   
       11 . The method of fabricating a semiconductor device according to  claim 10 , wherein said forming of the gate pattern comprises forming a gate electrode of polysilicon.  
   
   
       12 . The method of fabricating a semiconductor device according to  claim 11 , wherein said forming of the buffer insulating layer comprises forming an oxide layer on the semiconductor substrate including over the gate pattern.  
   
   
       13 . The method of fabricating a semiconductor device according to  claim 10 , wherein said forming of the spacer insulating layer comprises forming an oxide layer on the support layer.  
   
   
       14 . The method of fabricating a semiconductor device according to  claim 13 , wherein said forming of the support layer and the sacrificial layer each comprise the forming of a polysilicon layer or a nitride layer.  
   
   
       15 . The method of fabricating a semiconductor device according to  claim 10 , wherein said implanting of ions into the substrate comprises forming a respective lightly-doped source/drain region beneath the lateral portion of each of the L-shaped spacers and forming a highly-doped source/drain region contiguous to the lightly-doped source/drain region.