US2006238263A1PendingUtilityA1

Detection Of A Closed Loop Voltage

Assignee: EXAR CORPPriority: Sep 30, 2004Filed: Jun 30, 2006Published: Oct 26, 2006
Est. expirySep 30, 2024(expired)· nominal 20-yr term from priority
H03K 5/2481H03L 7/10
39
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Claims

Abstract

To detect whether a closed-loop's voltage is out of range, a voltage detector includes first and second transistors that deliver first and second currents respectively to first and second high impedance nodes. The voltage detector further includes third and fourth transistors that draw third and fourth currents respectively from the first and second nodes. The first and second currents are scaled replicas of a current flowing through a current source of a voltage-to-current converter that converts the close-loop's voltage to a current and supplies a first voltage to the first and second transistors. The third and fourth currents are scaled replicas of a different current flowing through a current mirror of the voltage-to-current converter and that supplies a second voltage to the third and fourth transistors.

Claims

exact text as granted — not AI-modified
1 - 4 . (canceled)  
   
   
       5 . A voltage detector coupled to a voltage-to-current converter and adapted to receive a first voltage and a second voltage generated by the voltage-to-current converter, the voltage detector comprising: 
 N programmable current mirrors each adapted to receive the first voltage and further to receive a different one of N programmable bits, wherein each programmable current mirror is adapted to supply a different proportion of a first current generated by a current source to a first output node having a high impedance; and    a current mirror adapted to receive the second voltage and generate a current that flows out of the first node.    
   
   
       6 . The voltage detector of  claim 5  wherein each said proportion is a different number greater than 1.  
   
   
       7 . The voltage detector of  claim 5  wherein each said proportion is a different fraction of 1.  
   
   
       8 . The voltage detector of  claim 7  wherein a first one of the N programmable current mirrors is adapted to generate a current that is ½ of the first current, and wherein an m th  one of the programmable current mirrors is adapted to generate a current that is ½ m  of the first current, wherein m is an integer varying from 1 to N.  
   
   
       9 . The voltage detector of  claim 8  wherein each programmable current mirrors further comprises: 
 a first transistor having a gate terminal adapted to receive an associated programmable bit, a source voltage coupled to a first supply voltage;    a second transistor having a gate terminal adapted to receive the associated programmable bit, a drain terminal coupled to the drain terminal of the first transistor, and a source terminal coupled to receive the first voltage;    a third transistor having a gate terminal coupled to the source terminal of the second transistor, a source terminal coupled to the first voltage supply, and a drain terminal coupled to the first output node.    
   
   
       10 . The voltage detector of  claim 9  wherein the current mirror further comprises: 
 a first transistor having a gate terminal coupled to receive the second voltage, a source terminal coupled to the second voltage supply, and a drain terminal coupled to the first output node.    
   
   
       11 - 14 . (canceled)  
   
   
       15 . A method of detecting a closed loop voltage, the method comprising: 
 forming N current paths each having an associated programmable bit and each adapted to deliver a current having a size defined a by different proportion of a first current in response to programming of its associated programmable bit, wherein the current flowing through each of the N current paths is delivered to a first output node having a high impedance;    a current mirror having a size that is proportional to a size of a second current source and adapted to draw current from the first output node;    determining the voltages generated on the first output node in response to varying the programming state of the N programmable bits; and    detecting the closed loop voltage using the determined voltages of the first output node.    
   
   
       16 . The method of  claim 15  wherein an m th  current path is adapted to generate a current having a size that is equal to ½ m  of the first current.

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