US2006231923A1PendingUtilityA1

Inductor for semiconductor integrated circuit and method of fabricating the same

Assignee: NEC ELECTRONICS CORPPriority: Jun 18, 2002Filed: Jun 20, 2006Published: Oct 19, 2006
Est. expiryJun 18, 2022(expired)· nominal 20-yr term from priority
H10W 20/4421H10W 20/497H10W 20/031H10D 84/00H10D 1/20
47
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Claims

Abstract

Disclosed are an inductor for a semiconductor integrated circuit, which provides a wider cross-sectional area, significantly reduces the resistance to improve the Q value and has a highly uniform film thickness, and a method of fabricating the inductor. A spiral inductor is formed on a topmost interconnection layer of a multilayer interconnection layer formed by a damascene method. This inductor is formed by patterning a barrier metal layer on an insulation film, on which a topmost interconnection is formed, in such a way that the barrier metal layer contacts the topmost interconnection, then forming a protective insulation film on an entire surface of the barrier metal layer, forming an opening in that portion of the protective insulation film which lies over the barrier metal layer, forming a thick Cu film with the barrier metal layer serving as a plating electrode, and performing wet etching of the Cu film. This process can allow the inductor to be so formed as to be thick and have a wide line width.

Claims

exact text as granted — not AI-modified
1 - 17 . (canceled)  
   
   
       18 . A semiconductor integrated circuit comprising: 
 a substrate;    an interconnection layer formed on said substrate by a damascene method, and comprising at least one interconnection; and    a conductive layer formed on said interconnection layer, said conductive layer including a pattern thereon to form an inductor, said inductor contacting said at least one interconnection, said conductive layer comprising:    a lower protective film formed over said interconnection layer;    a first barrier layer formed over said lower protective film; and    a metal film formed over said first barrier layer.    
   
   
       19 . The semiconductor integrated circuit according to  claim 18 , said conductive layer further comprising: 
 a lower barrier layer formed under said lower protective film, said lower protective film intervening between said lower barrier layer and said first barrier layer.    
   
   
       20 . The semiconductor integrated circuit according to  claim 18 , further comprising: 
 an upper barrier layer formed over said metal film.    
   
   
       21 . The semiconductor integrated circuit according to  claim 18 , wherein said inductor comprises a spiral shape.  
   
   
       22 . The semiconductor integrated circuit according to  claim 21 , wherein said spiral shape defines a ring shaped conductor having a first end and a second end, said first end and said second end being connected to said at least one interconnection.  
   
   
       23 . The semiconductor integrated circuit according to  claim 18 , wherein a side wall of said inductor is dented.  
   
   
       24 . The semiconductor integrated circuit according to  claim 18 , further comprising: 
 a bonding pad formed outside said inductor by patterning said conductive layer.    
   
   
       25 . The semiconductor integrated circuit according to  claim 18 , wherein said lower barrier layer comprises a TiN layer.  
   
   
       26 . The semiconductor integrated circuit according to  claim 18 , wherein said lower protective film comprises a SiON layer.  
   
   
       27 . The semiconductor integrated circuit according to  claim 18 , wherein said first barrier layer comprises a TiW layer.  
   
   
       28 . The semiconductor integrated circuit according to  claim 18 , further comprising: 
 an outer protective layer formed over said inductor.    
   
   
       29 . A semiconductor integrated circuit comprising: 
 an interconnection layer formed on said substrate by a damascene method, and comprising at least one interconnection; and    a conductive layer formed on said interconnection layer, said conductive layer including a pattern thereon to form an inductor, said conductive layer directly contacting said at least one interconnection.    
   
   
       30 . The semiconductor integrated circuit according to  claim 29 , said conductive layer comprising: 
 a first barrier layer formed on a top surface of said at least one interconnection;    a metal film formed over said first barrier layer; and    a second barrier layer formed over said metal film.    
   
   
       31 . The semiconductor integrated circuit according to  claim 30 , further comprising: 
 an outer protective layer formed over said inductor.    
   
   
       32 . The semiconductor integrated circuit according to  claim 30 , wherein said inductor comprises a spiral shape.  
   
   
       33 . The semiconductor integrated circuit according to  claim 30 , wherein said spiral shape defines a ring shaped conductor having a first end and a second end, said first end and said second end being connected to said at least one interconnection.  
   
   
       34 . The semiconductor integrated circuit according to  claim 30 , wherein a side wall of said inductor is dented.  
   
   
       35 . The semiconductor integrated circuit according to  claim 30 , further comprising: 
 a bonding pad formed outside said inductor by patterning said conductive layer.

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