Inrush current control system with soft start circuit and method

Abstract

A method of and system for controlling the inrush current generated in a MOSFET of an inrush current control system, wherein the MOSFET includes a source, gate and drain. The dV/dt at the drain of the MOSFET is controlled so as to set the inrush current level as a function of dV/dt, independent of current limit without requiring a separate capacitor connected between the gate and drain of the MOSFET so that the MOSFET can turn on and off more quickly.

1 . A method of controlling the inrush current generated in a MOSFET of an inrush current control system, wherein the MOSFET includes a source, gate and drain, the method comprising: 
 controlling the dV/dt at the drain of the MOSFET so as to set the inrush current level as a function of dV/dt, independent of current limit without requiring a separate capacitor connected between the gate and drain of the MOSFET.    
   
   
       2 . A method according to  claim 1 , wherein the inrush current control system includes a current input, a gate pin output and a ramp pin output, the ramp pin output being coupled to the drain of the MOSFET, and the gate pin output being coupled to the gate of the MOSFET, 
 wherein the method further comprises:    forcing current out of the ramp pin when the MOSFET is turned on.    
   
   
       3 . A method according to  claim 1 , wherein the inrush current control system includes a component coupled to the drain of the MOSFET, and 
 the step of controlling the dV/dt at the drain of the MOSFET includes:    generating a ramp current through the component so as to generate a ramp voltage at the drain of the MOSFET and limit the inrush current.    
   
   
       4 . A method according to  claim 3 , wherein the step of generating a ramp current includes generating a ramp current through a capacitive element coupled to the drain of the MOSFET.  
   
   
       5 . A method according to  claim 3 , wherein the step of generating a ramp current includes generating a ramp current through a resistive element coupled to the drain of the MOSFET.  
   
   
       6 . A method according to  claim 1 , the method further comprising: 
 limiting the current through the MOSFET during an over current condition.    
   
   
       7 . A method according to  claim 1 , the method further comprising: 
 limiting the current through the MOSFET during an output short event.    
   
   
       8 . A method according to  claim 1 , wherein the step of controlling the dV/dt at the drain, also includes controlling the rate of rise of the inrush current, dI/dt.  
   
   
       9 . A method according to  claim 1 , wherein the inrush current control system includes a current input, and a ramp pin output, the ramp pin output being coupled to the drain of the MOSFET, 
 the method further comprising:    holding the voltage at the ramp pin during power up or power step conditions.    
   
   
       10 . A method of controlling the turn on output current of an inrush current control system, comprising: 
 controlling the dV/dt at the drain of a FET so as to set the inrush current level of the FET as a function of dV/dt; and controlling the dI/dt of the turn on output current as a function of the ramp rate of a soft start voltage produced at an input of the control system when the control system is turned on.    
   
   
       11 . A method according to  claim 10 , further including 
 clamping the soft start voltage to a predetermined value.    
   
   
       12 . A method according to  claim 11 , wherein 
 clamping the soft start voltage to a limit includes establishing the limit by a clamping circuit.    
   
   
       13 . A method according to  claim 10 , wherein the inrush current control system includes a capacitor connected in between a soft short input pin and a voltage level source V EE , 
 wherein the method further includes    generating a ramping current to turn on the FET as a function of the voltage at the soft short input pin.    
   
   
       14 . A method according to  claim 10 , wherein the inrush current control system includes a capacitor coupled to the drain, 
 wherein the method further includes    generating the inrush output current through the FET,    wherein the capacitor is configured so that the FET can turn off independently of the value of the capacitor.    
   
   
       15 . A circuit configuration for controlling the inrush current generated in a MOSFET of an inrush current control system, wherein the MOSFET includes a source, gate and drain, the circuit configuration comprising: 
 a control circuit configured and arranged so that the dV/dt at the drain of the MOSFET sets the inrush current level as a function of dV/dt, independent of current limit without requiring a separate capacitor connected between the gate and drain of the MOSFET.    
   
   
       16 . A circuit configuration according to  claim 15 , wherein the control circuit includes a current input, a gate pin and a ramp pin output, wherein the ramp pin is coupled to the drain of the MOSFET, and wherein a ramp voltage is generated at the drain of the MOSFET when the voltage on the gate of the MOSFET is sufficient for the MOSFET to turn on.  
   
   
       17 . A circuit configuration according to  claim 15 , wherein the inrush current control system includes a component coupled between the ramp pin and the drain of the MOSFET, and the control circuit generates a ramp current through the component so as to generate a ramp voltage at the drain of the MOSFET and limit the inrush current.  
   
   
       18 . A circuit configuration according to  claim 17 , wherein the component is a capacitive element coupled to the drain of the MOSFET.  
   
   
       19 . A circuit configuration according to  claim 17 , wherein the component is a resistive element coupled to the drain of the MOSFET.  
   
   
       20 . A circuit configuration according to  claim 15 , further comprising: 
 a current limiter coupled to the MOSFET and configured so as to limit the current through the MOSFET during an over current condition.    
   
   
       21 . A circuit configuration according to  claim 15 , further comprising: 
 a current limiter coupled to the MOSFET and configured so as to limit the current through the MOSFET during an output short event.    
   
   
       22 . A circuit configuration according to  claim 15 , wherein the control circuit configured and arranged so that the dV/dt at the drain of the MOSFET sets the inrush current level as a function of dV/dt is further configured and arranged so as to control the rate of rise of the inrush current, dI/dt.  
   
   
       23 . A circuit configuration according to  claim 22 , further including an over current protection subcomponent configured and arranged so as to provide over current protection with respect to the inrush current.  
   
   
       24 . A circuit configuration according to  claim 15 , further including a current input, and a ramp pin output, the ramp pin output being coupled to the drain of the MOSFET such that the voltage at the ramp pin is held at a relatively constant value during power up or power step conditions.  
   
   
       25 . A circuit configured and arranged so as to control the turn on output current of an inrush current control system, comprising: 
 a control circuit configured and arranged so as to control the dV/dt at the drain of a FET so as to set the inrush current level through the FET as a function of dV/dt; and control the dI/dt of the turn on output current as a function of the ramp rate of a soft start voltage produced at an input of the control circuit when the control system is turned on.    
   
   
       26 . A circuit according to  claim 25 , further including 
 a voltage clamp configured and arranged so as to clamp the soft start voltage to a predetermined value.    
   
   
       27 . A circuit according to  claim 25 , further including a soft start pin and a capacitor coupled between the soft start pin and a voltage source V EE , the circuit being configured and arranged so that a ramp current is generated through the capacitor as a function of the voltage at the soft start pin.  
   
   
       28 . A method according to  claim 25 , wherein the inrush current control system includes a capacitor coupled to the drain, and the inrush control system is configured and arranged so that the FET can turn off independently of the value of the capacitor.