US2006226414A1PendingUtilityA1
Group III-V nitride-based semiconductor substrate and method of making same
Est. expiryApr 11, 2025(expired)· nominal 20-yr term from priority
Inventors:Yuichi Oshima
H10P 14/3416H10P 14/3216H10P 14/2921H10P 14/272H10P 14/38H10P 14/24C30B 25/02H10H 20/0137H10D 62/8503C30B 29/403
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Claims
Abstract
A method of making a group III-V nitride-based semiconductor substrate has the steps of: providing a first crystal substrate; placing the first crystal substrate on a susceptor; holding down the first crystal substrate on the susceptor; and growing a first group III-V nitride-based semiconductor crystal on the first crystal substrate.
Claims
exact text as granted — not AI-modified1 . A group III-V nitride-based semiconductor substrate, comprising:
a group III-V nitride-based semiconductor crystal; wherein said substrate has a surface area of 45 cm 2 or more, said substrate has thickness of 200 μm or more, said substrate has an in-plane dislocation density of 2×10 7 cm −2 or less in average, and the in-plane dislocation density is 150% or less of the average at maximum.
2 . The group III-V nitride-based semiconductor substrate according to claim 1 , wherein:
said substrate has at a surface thereof a dispersion in crystal axis of ±0.3 degrees or less.
3 . The group III-V nitride-based semiconductor substrate according to claim 1 , wherein:
said substrate has at an arbitrary point of a surface thereof a carrier concentration that falls within ±20% of an average carrier concentration at the surface.
4 . The group III-V nitride-based semiconductor substrate according to claim 1 , wherein:
said substrate has at an arbitrary point of a surface thereof a thickness that falls within ±10 μm from an average thickness at the surface.
5 . The group III-V nitride-based semiconductor substrate according to claim 1 , wherein;
said group III-V nitride-based semiconductor crystal has an FWHM value of X-ray rocking curve of 250 seconds or less.
6 . The group III-V nitride-based semiconductor substrate according to claim 1 , wherein:
said group III-V nitride-based semiconductor crystal has a composition of In x Al y Ga 1-x-y N (x≧0, y≧0, x+y≦1)
7 . A method of making a group III-V nitride-based semiconductor substrate, comprising:
providing a first crystal substrate; placing the first crystal substrate on a susceptor; holding down the first crystal substrate on the susceptor; and growing a first group III-V nitride-based semiconductor crystal on the first crystal substrate.
8 . The method according to claim 7 , wherein:
the first crystal substrate is bonded to the susceptor.
9 . The method according to claim 7 , wherein:
the first crystal substrate is a hetero-substrate that has a composition different from the first group III-V nitride-based semiconductor crystal.
10 . The method according to claim 7 , wherein
the first crystal substrate is a hetero-substrate that has a composition different from the first group III-V nitride-based semiconductor crystal, and said method further comprising; growing a second group III-V nitride-based semiconductor crystal on the hetero-substrate, providing the second group III-V nitride-based semiconductor crystal with a void; growing a third group III-V nitride-based semiconductor crystal on the second group III-V nitride-based semiconductor crystal provided with the void; removing the hetero-substrate and the second group III-V nitride-based semiconductor crystal to have the third group III-V nitride-based semiconductor crystal that corresponds to the first group III-V nitride-based semiconductor crystal.
11 . The method according to claim 9 , wherein:
said hetero-substrate is a sapphire substrate.
12 . The method according to claim 7 , wherein:
the first crystal substrate is a seed crystal substrate that has the same composition as the first group III-V nitride-based semiconductor crystal.
13 . The method according to claim 7 , wherein:
said first group III-V nitride-based semiconductor crystal has a composition of In x Al y Ga 1-x-y N (x≧0, y≧0, x+y≦1).
14 . A method of making a group III-V nitride-based semiconductor substrate, comprising;
providing a first crystal substrate; placing the first crystal substrate on a susceptor; holding down the first crystal substrate on the susceptor to allow exposition of a part of an opposite surface of the first crystal substrate to a surface of the first crystal substrate that faces the susceptor; and growing a first group III-V nitride-based semiconductor crystal on the exposed opposite surface of the first crystal substrate.
15 . The method according to claim 14 , wherein:
the first crystal substrate is bonded to the susceptor.
16 . The method according to claim 14 , wherein:
the first crystal substrate is a hetero-substrate that has a composition different from the first group III-V nitride-based semiconductor crystal.
17 . The method according to claim 14 , wherein:
the first crystal substrate is a hetero-substrate that has a composition different from the first group III-V nitride-based semiconductor crystal, and said method further comprising: growing a second group III-V nitride-based semiconductor crystal on the hetero-substrate, providing the second group III-V nitride-based semiconductor crystal with a void; growing a third group III-V nitride-based semiconductor crystal on the second group III-V nitride-based semiconductor crystal provided with the void; removing the hetero-substrate and the second group III-V nitride-based semiconductor crystal to have the third group III-V nitride-based semiconductor crystal that corresponds to the first group III-V nitride-based semiconductor crystal.
18 . The method according to claim 16 , wherein:
said hetero-substrate is a sapphire substrate.
19 . The method according to claim 14 , wherein:
the first crystal substrate is a seed crystal substrate that has the same composition as the first group III-V nitride-based semiconductor crystal.
20 . The method according to claim 14 , wherein:
said first group III-V nitride-based semiconductor crystal has a composition of In x Al y Ga 1-x-y N (x≧0, y≧0, x+y≦1).Join the waitlist — get patent alerts
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