Thin germanium oxynitride gate dielectric for germanium-based devices

Abstract

A method for producing thin, below 6 nm of equivalent oxide thickness, germanium oxynitride layer on Ge-based materials for use as gate dielectric is disclosed. The method involves a two step process. First, nitrogen is incorporated in a surface layer of the Ge-based material. Second, the nitrogen incorporation is followed by an oxidation step. The method yields excellent thickness control of high quality gate dielectrics for Ge-based field effect devices, such as MOS transistors. Structures of devices having the thin germanium oxynitride gate dielectric and processors made with such devices are disclosed, as well.

1 . A Ge-based field effect device having a gate dielectric, said gate dielectric comprising: 
 a germanium oxynitride layer having a nitrogen concentration with an integrated value of surface density of between about 1E14 per cm 2  and 3E15 per cm 2  and an equivalent oxide thickness of between about 0.5 nm and 5 nm.    
   
   
       2 . The Ge-based field effect device of  claim 1 , wherein said gate dielectric possesses greater resistance against charge tunneling than a SiO 2  gate dielectric, meanwhile a capacitance per unit area of said gate dielectric is at least as large as said capacitance per unit area of said SiO 2  gate dielectric.  
   
   
       3 . The Ge-based field effect device of  claim 1 , wherein said device is a Ge MOS transistor.  
   
   
       4 . A processor, comprising: 
 at least one chip, wherein said at least one chip comprises at least one Ge-based field effect device having a gate dielectric, said gate dielectric comprising a germanium oxynitride layer having a nitrogen concentration with an integrated value of surface density of between about 1E14 per cm 2  and 3E15 per cm 2  and an equivalent oxide thickness of between about 0.5 nm and 5 nm.    
   
   
       5 . The processor of  claim 4 , wherein said processor is a digital processor.  
   
   
       6 . The processor of  claim 4 , wherein said processor comprises at least one analog circuit.  
   
   
       7 . The processor of  claim 4 , wherein said germanium oxynitride layer has differing said equivalent oxide thickness on at least two locations of said at least one chip.