US2006197126A1PendingUtilityA1

Methods for forming structures including strained-semiconductor-on-insulator devices

Assignee: AMBERWAVE SYSTEMS CORPPriority: Jun 7, 2002Filed: May 2, 2006Published: Sep 7, 2006
Est. expiryJun 7, 2022(expired)· nominal 20-yr term from priority
H10P 90/1924H10P 90/1916H10P 90/1914H10W 10/181H10W 10/061H10P 90/1906H10D 86/201H10D 86/01H10D 30/6758H10D 30/6748H10D 30/6741H10D 30/791H10D 30/0516H10D 30/0323H10D 30/024H10D 30/62
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Claims

Abstract

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

Claims

exact text as granted — not AI-modified
1 - 58 . (canceled)  
   
   
       59 . A method for forming a structure, the method comprising: 
 providing a substrate having a strained semiconductor layer disposed over a substrate dielectric layer;    forming a transistor in the strained layer by 
 forming a gate dielectric layer above a portion of the strained semiconductor layer,  
 forming a gate contact above the gate dielectric layer, and  
 forming a source region and a drain region in a portion of the strained semiconductor layer, proximate the gate dielectric layer;  
   removing a portion of the strained layer and the substrate dielectric layer to expose a portion of the substrate;    defining a collector in the exposed portion of the substrate;    forming a base over the collector; and    forming an emitter over the base.    
   
   
       60 . The method of  claim 59 , wherein the strained semiconductor layer is tensilely strained.  
   
   
       61 . The method of  claim 60 , wherein the strained semiconductor layer comprises tensilely strained silicon.  
   
   
       62 . The method of  claim 59 , wherein the strained semiconductor layer is compressively strained.  
   
   
       63 . The method of  claim 62 , wherein the strained semiconductor layer comprises compressively strained germanium.  
   
   
       64 . The method of  claim 59 , further comprising defining a bipolar transistor, the bipolar transistor comprising the collector, the base, and the emitter.  
   
   
       65 . The method of  claim 64 , further comprising interconnecting the bipolar transistor and the transistor.  
   
   
       66 . The method of  claim 59 , wherein the base is disposed in contact with the collector and over the exposed portion of the substrate.  
   
   
       67 . The method of  claim 59 , wherein the strained semiconductor layer is in contact with the substrate dielectric layer.  
   
   
       68 . The method of  claim 59 , wherein the strained semiconductor layer comprises at least one of a group II, a group III, a group IV, a group V, and a group VI element.  
   
   
       69 . The method of  claim 67 , wherein the strained semiconductor layer comprises at least one of gallium arsenide, indium phosphide, and zinc selenide.

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