Method and system for fabricating and cleaning free-standing nanostructures

Abstract

Systems and methods include introducing a semiconductor wafer into a process chamber. An etching chemistry is injected into the process chamber to etch a patterned layer and to release free-standing nanostructures on the semiconductor wafer. The etching chemistry includes a supercritical or liquid carbon dioxide fluid and an etching solution. The semiconductor wafer is rinsed by flooding a supercritical or liquid carbon dioxide fluid into the process chamber. The semiconductor wafer is dried by venting out supercritical or liquid carbon dioxide fluid from the process chamber.

1 . A method for fabricating and cleaning free-standing nanostructures, comprising the steps of: 
 providing a semiconductor wafer comprising a substrate and a patterned layer above the substrate, the patterned layer comprising a plurality of openings extending from an upper surface of the patterned layer to an upper surface of the substrate, and structural elements being arranged within the openings;    providing a process chamber, the process chamber being configured to receive the semiconductor wafer;    introducing the semiconductor wafer into the process chamber;    injecting an etching chemistry into the process chamber to etch the patterned layer and to release the structural elements as free-standing nanostructures on the semiconductor wafer, the etching chemistry comprising a carbon dioxide fluid and an etching solution;    injecting a cleaning chemistry into the process chamber in order to remove particles from the surface of structural elements being free-standing nanostructures on the semiconductor wafer, the cleaning chemistry comprising a supercritical carbon-dioxide fluid and cleaning solution;    rinsing the semiconductor wafer by flooding a carbon dioxide fluid into the process chamber; and    drying the semiconductor wafer by injecting a supercritical carbon dioxide fluid into the process chamber and by venting out the supercritical carbon dioxide fluid from the process chamber.    
   
   
       2 . The method of  claim 1 , wherein the carbon dioxide fluid is in a liquid state in the etching chemistry injected into the process chamber.  
   
   
       3 . The method of  claim 1 , wherein the carbon dioxide fluid is in a supercritical state in the etching chemistry injected into the process chamber.  
   
   
       4 . The method of  claim 3 , wherein the injection of the supercritical carbon dioxide fluid containing etching chemistry into the process chamber is performed at a single transparent phase of the supercritical carbon dioxide fluid.  
   
   
       5 . The method of  claim 4 , wherein the step of injecting the etching chemistry into the process chamber is performed at a pressure of the supercritical carbon dioxide fluid within the process chamber being above 1000 psi.  
   
   
       6 . The method of  claim 5 , wherein the step of injecting the etching chemistry into the process chamber is performed at a temperature of the supercritical carbon dioxide fluid within the process chamber being above 40° C.  
   
   
       7 . The method of  claim 1 , wherein the carbon dioxide fluid is in a liquid state during the rinsing of the semiconductor wafer.  
   
   
       8 . The method of  claim 1 , wherein the carbon dioxide fluid is in a supercritical state during the rinsing of the semiconductor wafer.  
   
   
       9 . The method of  claim 8 , wherein the rinsing of the semiconductor wafer is performed at constant pressure and constant temperature of the supercritical carbon dioxide fluid within the process chamber.  
   
   
       10 . The method of  claim 1 , wherein the step of drying the semiconductor wafer further includes releasing the pressure created by the venting supercritical carbon dioxide fluid within the process chamber.  
   
   
       11 . The method of  claim 1 , wherein, prior to the step of drying the semiconductor wafer, the method further comprises: 
 flushing the free-standing nanostructures with a supercritical carbon dioxide fluid at flow ranging from about 0.1 L/min to about 5 L/min.    
   
   
       12 . The method of  claim 1 , wherein adjacent openings of the plurality of openings of the semiconductor wafer are spaced at a distance of about 200 nm or less.  
   
   
       13 . The method of  claim 12 , wherein the patterned layer of the semiconductor wafer has a thickness in the range of about 1 μm to about 20 μm.  
   
   
       14 . The method of  claim 13 , wherein openings of the plurality of openings of the semiconductor wafer have a width of about 200 nm or less.  
   
   
       15 . The method of  claim 1 , wherein the cleaning solution of the cleaning chemistry changes the zeta-potential of the surface of the free-standing nanostructures to promote the separation of the particles from the surface of the free-standing nanostructures.  
   
   
       16 . The method of  claim 1 , wherein the cleaning solution of the cleaning chemistry etches the surface of the free-standing nanostructures up to a thickness between 5 Å and 100 Å so as to promote the separation of the particles from the surface of the free-standing nanostructures.  
   
   
       17 . The method of  claim 16 , wherein the cleaning solution of the cleaning chemistry comprises an etchant being selected from the group consisting of HF, H 2 SO 4 , HCl, H 2 O 2 , and NH 3 .  
   
   
       18 . The method of  claim 16 , wherein the cleaning solution comprises one of an anionic surfactant and a non-ionic surfactant that allows for etch residues and particles to be transported away from the semiconductor in micellar structures.  
   
   
       19 . The method of  claim 18 , wherein the anionic surfactant comprises one of a sodium dioctyl sulfosuccinate and a sodium dioctyl sulfosuccinate derivative.  
   
   
       20 . The method of  claim 18 , wherein the non-ionic surfactant is selected from the group consisting of ethylene oxide, octylphenol ethoxylates, alkyl polyglucosides, acetylenic diols, alkoxylated acetylenic diols, derivatives of each, and combinations thereof.  
   
   
       21 . The method of  claim 15 , further comprising: 
 applying a mechanical force to the particles in order to fully remove the particle from the surface of the free-standing nanostructures.    
   
   
       22 . The method of  claim 21 , wherein the mechanical force comprises application of megasonics.  
   
   
       23 . The method of  claim 21 , wherein the mechanical force comprises periodical increasing and decreasing of the chamber pressure.  
   
   
       24 . The method of  claim 21 , wherein the mechanical force comprises agitation of the cleaning chemistry.  
   
   
       25 . A method for cleaning free-standing nanostructures, comprising the steps of: 
 providing a semiconductor wafer having a substrate and a patterned layer above the substrate, the patterned layer comprising structural elements as free-standing nanostructures;    providing a process chamber, the process chamber being configured to receive the semiconductor wafer;    introducing the semiconductor wafer into the process chamber;    injecting a cleaning chemistry into the process chamber in order to remove particles from the surface of structural elements being free-standing nanostructures on the semiconductor wafer, the cleaning chemistry comprising a supercritical carbon-dioxide fluid and a cleaning solution;    rinsing the semiconductor wafer by flooding a supercritical carbon-dioxide fluid into the process chamber; and    drying the semiconductor wafer by venting out the supercritical carbon-dioxide fluid from the process chamber.    
   
   
       26 . The method of  claim 25 , wherein at least part of the free-standing nanostructures have a height-to-width-ratio of 20 or larger.  
   
   
       27 . The method of  claim 26 , wherein the free-standing nanostructures are aligned with respect to each other and the substrate to facilitate forming of bottom electrodes of a stacked capacitor memory cell.  
   
   
       28 . The method of  claim 26 , wherein the free-standing nanostructures are aligned with respect to each other and the substrate to facilitate forming of active transistors of a surrounding gate transistor.  
   
   
       29 . The method of  claim 25 , wherein the cleaning solution of the cleaning chemistry changes the zeta-potential of the surface of the free-standing nanostructures to promote the separation of the particles from the surface of the free-standing nanostructures.  
   
   
       30 . The method of  claim 25 , wherein the cleaning solution etches the surface of the free-standing nanostructures up to a thickness between 5 Å and 100 Å so as to promote the separation of the particles from the surface of the free-standing nanostructures.  
   
   
       31 . The method of  claim 29  further comprising: 
 applying a mechanical force to the particles in order to fully remove the particles from the surface of the free-standing nanostructures.    
   
   
       32 . The method of  claim 31 , wherein the mechanical force comprises application of megasonics.  
   
   
       33 . The method of  claim 31 , wherein the mechanical force comprises periodical increasing and decreasing of the chamber pressure.  
   
   
       34 . The method of  claim 31 , wherein the mechanical force comprises agitation of the cleaning chemistry.  
   
   
       35 . A system for fabricating and cleaning free-standing nanostructures, comprising: 
 a semiconductor wafer comprising a substrate and a patterned layer disposed above the substrate, the patterned layer comprising a plurality of openings extending from the surface of the patterned layer to the surface of the substrate and structural elements being arranged within the openings;    a process chamber, the process chamber being configured to receive the semiconductor wafer;    means for introducing the semiconductor wafer into the process chamber;    means for injecting an etching chemistry into the process chamber to etch the patterned layer and to release the structural elements as free-standing nanostructures on the semiconductor wafer, the etching chemistry comprising a liquid or supercritical carbon dioxide fluid and an etching solution;    means for injecting a cleaning chemistry into the process chamber in order to remove particles from the surface of structural elements being free-standing nanostructures on the semiconductor wafer, the cleaning chemistry comprising a supercritical carbon-dioxide fluid and cleaning solution;    means for rinsing the semiconductor wafer by flooding supercritical carbon dioxide fluid into the process chamber; and    means for drying the semiconductor wafer by venting out supercritical carbon dioxide fluid from the process chamber.