US2006190793A1PendingUtilityA1

Establishing a reference bit in a bit pattern

Assignee: VISS MARLINPriority: Feb 18, 2005Filed: Feb 18, 2005Published: Aug 24, 2006
Est. expiryFeb 18, 2025(expired)· nominal 20-yr term from priority
Inventors:Marlin Viss
H04L 25/0224G01R 31/31813G01R 31/3183
37
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Claims

Abstract

A method establishes a reference bit in a bit pattern. The method includes (a) identifying a series of bit sequences in the bit pattern including all bit sequences having the largest number of consecutive bits with a common logic state and (b) assigning a reference bit based on one bit sequence in the series when the series includes only one bit sequence. The method includes (c) identifying a series of bit sequences in the bit pattern that includes all bit sequences that have the largest number of consecutive bits with an alternative logic state from a last prior identified series of bit sequences, and that are adjacent to each bit sequence in the last prior identified series of bit sequences. The method assigns a reference bit based on one bit sequence in the series identified in (c) when the series identified in (c) includes only one bit sequence.

Claims

exact text as granted — not AI-modified
1 . A method for establishing a reference bit in a bit pattern, comprising: 
 (a) identifying a series of bit sequences in the bit pattern that includes all bit sequences that have the largest number of consecutive bits having a common logic state; and    (b) assigning a reference bit based on one bit sequence in the series of bit sequences when the series of bit sequences includes not more than one bit sequence.    
   
   
       2 . The method of  claim 1  further comprising (c) identifying a series of bit sequences in the bit pattern that includes all bit sequences in the bit pattern that have the largest number of consecutive bits with an alternative logic state from a last prior identified series of bit sequences, and that are adjacent to each bit sequence in the last prior identified series of bit sequences.  
   
   
       3 . The method of  claim 2  further comprising (d) assigning a reference bit based on one bit sequence in the series of bit sequences identified in (c) when the series of bit sequences identified in (c) includes not more than one bit sequence.  
   
   
       4 . The method of  claim 3  further comprising repeating (c) and (d) until the series of bit sequences identified in (c) includes not more than one sequence of bits.  
   
   
       5 . A method for establishing a reference bit in a bit pattern, comprising: 
 (a) identifying a series of bit sequences in the bit pattern that includes all bit sequences that have the largest number of consecutive logic one bits; and    (b) assigning a reference bit based on one bit sequence in the series of bit sequences when there is not more than one bit sequence having the largest number of consecutive logic one bits.    
   
   
       6 . The method of  claim 5  further comprising (c) identifying a series of bit sequences in the bit pattern that includes all bit sequences in the bit pattern that have the largest number of consecutive bits with an alternative logic state from a last prior identified series of bit sequences, and that are adjacent to each bit sequence in the last prior identified series of bit sequences.  
   
   
       7 . The method of  claim 6  further comprising (d) assigning a reference bit based on one bit sequence in the series of bit sequences identified in (c) when the series of bit sequences identified in (c) includes not more than one bit sequence.  
   
   
       8 . The method of  claim 7  further comprising repeating (c) and (d) until the series of bit sequences identified in (c) includes not more than one sequence of bits.  
   
   
       9 . A method for establishing a reference bit in a bit pattern, comprising: 
 (a) identifying a series of bit sequences in the bit pattern that includes all bit sequences that have the largest number of consecutive logic one bits; and    (b) assigning a reference bit based on one bit sequence in the series of bit sequences when there is not more than one bit sequence having the largest number of consecutive logic zero bits.    
   
   
       10 . The method of  claim 9  further comprising (c) identifying a series of bit sequences in the bit pattern that includes all bit sequences in the bit pattern that have the largest number of consecutive bits with an alternative logic state from a last prior identified series of bit sequences, and that are adjacent to each bit sequence in the last prior identified series of bit sequences.  
   
   
       11 . The method of  claim 10  further comprising (d) assigning a reference bit based on one bit sequence in the series of bit sequences identified in (c) when the series of bit sequences identified in (c) includes not more than one bit sequence.  
   
   
       12 . The method of  claim 11  further comprising repeating (c) and (d) until the series of bit sequences identified in (c) includes not more than one sequence of bits.

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