Vertical gate semiconductor device and method for fabricating the same

Abstract

A first region 11 functioning as a transistor includes a drain region 111 , a body region 112 formed over the drain region 111 , a source region 113 A formed over the body region 112 and a trench formed through the body region 112 and having a gate electrode 120 buried therein. A source region 113 B is formed over the body region 112 extending in a second region 12.

1 - 15 . (canceled)  
   
   
       16 . A method of fabricating a vertical trench gate semiconductor device having a first portion functioning as a transistor and a second portion functioning as an electrical contact with a body region of said transistor and arranged adjacent to said first portion, comprising the steps of: 
 forming a first drain region in said first portion and a second drain region in said second portion and forming a first body region over said first drain region and a second body region over said second drain region;    forming a trench in said first body region and said second body region;    forming a first source region over said first body region; and    forming a second source region over said second body region,    wherein said first source region and said second source region are formed so as to be electrically connected to each other.    
   
   
       17 . The method of  claim 16 , wherein 
 said fourth step includes introducing simultaneously an impurity to parts respectively to be said first source region and said second source region in said first portion.    
   
   
       18 . The method of  claim 16 , wherein 
 said second source region is formed so as to cover an entirety of said second body region.    
   
   
       19 . The method of  claim 16 , further comprising the step of: 
 forming a heavily doped region in an upper portion of said second body region    wherein an impurity concentration of said upper portion is higher than an impurity concentration of a lower portion of said second body region.    
   
   
       20 . The method of  claim 16 , wherein 
 said second step includes forming said trench also through said second body region, and    said method further comprising, after said second step, the steps of:    forming a gate in said trench so as to form a recessed part in an upper part of said trench and so as to expose said second body region at a wall face of said recessed part; and    forming, in said recessed part, an additional electrode electrically connected with said second body region.    
   
   
       21 . The method of  claim 16 , wherein 
 said method further comprising, after said second step and said fourth step, the steps of:    forming a gate in said trench so as to form a recessed part in an upper part of each said trench and so as to expose said second source region at a wall face of said recessed part; and    forming, in said recessed part, an additional electrode electrically connected with said second source region.    
   
   
       22 . The method of  claim 16 , wherein 
 said method further comprising, after said second step and said fourth step, the steps of:    forming a gate electrode in said trench so as to form a recessed part in an upper part of said trench and so as to expose said second body region and said second source region at a wall face of said recessed part; and    forming, in said recessed part, an additional electrode electrically connected with said second body region and said second source region.    
   
   
       23 . A method of fabricating a vertical trench gate semiconductor device having a first portion functioning as a transistor and a second portion functioning as electrical contact with a body region of said transistor and arranged adjacent to said first portion comprising the steps of: 
 forming a first drain region in said first portion and forming a second drain region in said second portion and forming a first body region over said first drain region and forming a second body region over said second drain region;    forming a trench in each said first body region and second body region;    forming a gate electrode in said trench so as to form a recessed part in an upper part of said trench and so as to expose said second body region at a wall face of said recessed part; and    forming, in said recessed part, an additional electrode electrically connected with the second body region.    
   
   
       24 . The method of  claim 23 , further comprising the step of: 
 forming a heavily doped region in an upper portion of said second body region    wherein an impurity concentration of said upper portion is higher than an impurity concentration of a lower portion of said second body region.    
   
   
       25 . The method of  claim 24 , wherein 
 said upper portion is exposed at the wall face of said recessed part.    
   
   
       26 - 37 . (canceled)