Methods for patterning dielectric material, and methods for aligning semiconductor fabrication molds and semiconductor substrates

Abstract

The invention includes methods of forming patterns in low-k dielectric materials by contact lithography. In a particular application, a mold having a first pattern is pressed into a low-k dielectric material to form a second pattern within the material. The second pattern is substantially complementary to the first pattern. The mold is then removed from the low-k dielectric material. The invention also includes a method of forming a mold; and includes a mold configured to pattern a mass over a semiconductor substrate during contact lithography of the mass.

1 - 44 . (canceled)  
     
     
         45 . A method for aligning a semiconductor fabrication mold and a semiconductor substrate comprising: 
 providing a semiconductor fabrication mold having a first alignment article associated therewith;    providing a semiconductor substrate having a second alignment article associated therewith, the semiconductor substrate having a non-photoresist material thereover; and    aligning the first alignment article of the semiconductor fabrication mold relative to the second alignment article of the semiconductor substrate, the non-photoresist material being between the mold and the substrate during the aligning.    
     
     
         46 . The method of  claim 45  wherein the first article comprises a pin and the second article comprises a receptacle, the aligning comprising mating the pin with the receptacle.  
     
     
         47 . The method of  claim 45  further comprising utilizing the mold to form a pattern in the material.  
     
     
         48 . The method of  claim 45  further comprising, after aligning the first and second alignment articles with one another, pressing the mold relative to the material to form a reverse image of at least a portion of the pattern of the mold within the material.  
     
     
         49 . The method of  claim 45  wherein one of the first and second alignment articles is a pin and the other of the first and second alignment articles is a receptacle; and wherein the aligning comprises mating the pin within the receptacle.  
     
     
         50 . The method of  claim 45  wherein: 
 the second alignment article is a first optical pattern, the first optical pattern being supported by the semiconductor substrate;    the mold comprises a substantially transparent portion and a second optical pattern within the substantially transparent portion; and    the aligning comprises aligning the first and second optical patterns relative to one another.    
     
     
         51 . A method of patterning a dielectric material,comprising: 
 providing a substrate having a dielectric material thereover, the substrate having an optical alignment pattern supported thereby;    providing a mold having a first topographical pattern, the mold comprising a region through which the optical alignment pattern can be viewed during an alignment of the mold and substrate relative to one another;    aligning the mold and substrate relative to one another;    after the aligning, utilizing the mold to press a second topographical pattern in the dielectric material, the second topographical pattern being substantially complementary to the first topographical pattern; and    after utilizing the mold to press the second topographical pattern, removing the mold from over the dielectric material.    
     
     
         52 . The method of  claim 51  wherein the dielectric material comprises a low-k dielectric material.  
     
     
         53 . The method of  claim 51  wherein the mold comprises a siloxane.  
     
     
         54 . The method of  claim 51  wherein the second topographical pattern comprises shallow trenches within the dielectric material and deep openings through the dielectric material.