Semiconductor package and method of manufacturing the same

Abstract

Disclosed herein are a semiconductor package used in digital optical instruments and a method of manufacturing the same. The semiconductor package comprises a wafer made of a silicon material and having pad electrodes formed at one side surface thereof, an IR filter attached on the pad electrodes of the wafer by means of a bonding agent, terminals electrically connected to the pad electrodes, respectively, in via holes formed at the other side surface of the wafer, which is opposite to the pad electrodes, and bump electrodes, each of which is connected to one side of each of the terminals. The present invention is capable of minimizing the size of a semiconductor package having an image sensor, which is referred to as a complementary metal oxide semiconductor (CMOS) or a charge coupled device (CCD), through the application of a wafer level package technology, thereby reducing the manufacturing costs of the semiconductor package and accomplishing production on a large scale.

1 . A semiconductor package used in digital instruments, the package comprising: 
 a wafer made of a silicon material, the wafer having pad electrodes formed at one side surface thereof,    an IR filter attached on the pad electrodes of the wafer by means of a bonding agent;    terminals electrically connected to the pad electrodes, respectively, in via holes formed at the other side surface of the wafer, which is opposite to the pad electrodes; and    bump electrodes, each of which is connected to one side of each of the terminals.    
   
   
       2 . The package as set forth in  claim 1 , wherein the IR filter has a coating surface opposite to the surface of the wafer.  
   
   
       3 . The package as set forth in  claim 1 , wherein the IR filter is processed in the form corresponding to the wafer, and the IR filter is composed of a glass sheet having an IR coating surface formed on the surface thereof.  
   
   
       4 . The package as set forth in  claim 1 , wherein the sum of the thickness of the wafer and the thickness of the IR filter attached to the wafer by means of the bonding agent corresponds to the initial level of the wafer.  
   
   
       5 . A method of manufacturing a semiconductor package used in digital instruments, the method comprising the steps of: 
 bonding an IR filter to a wafer, which has the pad electrodes formed at one side surface thereof and is made of a silicon material;    removing the rear part of the wafer by cutting the rear part of the wafer such that the sum of the thickness of the wafer and the thickness of the IR filter is within the initial thickness of the wafer;    forming via holes through the wafer from the rear surface of the wafer to the pad electrodes;    forming terminals electrically connected to the pad electrodes in the via holes;    forming bump electrodes on the terminals, respectively; and    cutting the wafer into a plurality of semiconductor packages.    
   
   
       6 . The method as set forth in  claim 5 , wherein the IR filter has a coating surface opposite to the surface of the wafer.  
   
   
       7 . The method as set forth in  claim 5 , wherein the IR filter is processed in the form corresponding to the wafer, and the IR filter is composed of a glass sheet having an IR coating surface formed on the surface thereof.  
   
   
       8 . The method as set forth in  claim 5 , wherein the step of forming the via holes is carried out using a microwave photon beam, i.e., a femtosecond laser.  
   
   
       9 . The method as set forth in  claim 8 , wherein the via holes are through via holes, which are formed through the pad electrodes, or blind via holes, the depth of which reaches the pad electrodes.  
   
   
       10 . The method as set forth in  claim 5 , wherein the step of forming the terminals is carried out to sputter a predetermined region of the wafer, including the via holes, and to form a three-layered or four-layered metal layer.  
   
   
       11 . The method as set forth in  claim 10 , wherein the metal layer formed includes an adhesion layer, a barrier layer, and a solder wettable layer by having a tantalum (Ta) layer, a tantalum nitride (TaN) layer, or a copper (Cu) layer.  
   
   
       12 . The method as set forth in  claim 5 , wherein the step of forming the terminals is carried out to form seed metal at a predetermined region of the wafer, including the via holes, by sputtering and to fill the respective via holes with conductive paste by printing.  
   
   
       13 . The method as set forth in  claim 5 , wherein the step of forming the terminals is carried out to form a metal layer at a predetermined region of the wafer, including the via holes, by sputtering and to fill the respective via holes with insulating resin such that the metal layer is protected by the insulating resin.  
   
   
       14 . The method as set forth in  claim 13 , wherein the insulating resin benzocyclobutene (BCB), polyimide (PI), or epoxy, which has low thermal expansion, high resistance to humidity, and excellent reliability.  
   
   
       15 . The method as set forth in  claim 10 , wherein the step of forming the terminals is carried out at the wafer level.  
   
   
       16 . The method as set forth in  claim 5 , wherein the step of forming the bump electrodes on the respective terminals is carried out using photosensitive film resist.  
   
   
       17 . The method as set forth in  claim 11 , wherein the step of forming the terminals is carried out at the wafer level.  
   
   
       18 . The method as set forth in  claim 12 , wherein the step of forming the terminals is carried out at the wafer level.  
   
   
       19 . The method as set forth in  claim 13 , wherein the step of forming the terminals is carried out at the wafer level.  
   
   
       20 . The method as set forth in  claim 14 , wherein the step of forming the terminals is carried out at the wafer level.