Semiconductor device manufacturing device

Abstract

A process for production of a semiconductor device having a multi-layer wiring of dual damascene structure in a low-dielectric constant interlayer insulating film. The process consists of the following steps. A first insulating film ( 6 ) and a second insulating film ( 7 ) are formed. A first to third mask forming layers ( 8 ), ( 9 ), and ( 20 ) are formed. The third mask forming layer is patterned so as to form the third mask for the wiring groove pattern. A resist mask of the connecting hole pattern is formed on the second mask forming layer including the third mask. The third mask and the second and first mask forming layers are etched, and the second insulating film is etched. The second mask of the wiring groove pattern is formed by using the third mask, and the connecting hole is made to the middle of the first insulating film. The first mask forming layer is etched by using the second mask, and the first mask of the wiring groove pattern is formed, and the first insulating film remaining at the bottom of the connecting hole is etched so as to make the connecting hole. The wiring groove is formed in the second insulating film by using the first or second mask.

1 . A process for production of a semiconductor device having interlayer insulating films including an organic insulating film, said process comprising: 
 a step of sequentially forming on an interlayer insulating film three or more etching mask forming layers consisting of mutually different two or more kinds of film,    a step of patterning the uppermost etching mask forming layer, thereby forming the uppermost mask layer, etching the next stage etching mask forming layer under the uppermost etching mask forming layer through the uppermost layer mask, thereby forming the next stage etching mask, etching the next stage etching mask forming layer after next through the next stage etching mask, thereby forming the next stage etching mask after next, and sequentially etching the etching mask forming layer under the etching mask forming layer formed thereon through the etching mask formed through the etching mask forming layer formed thereon, thereby forming the etching mask, and    a step of etching the interlayer insulating film through the thus formed etching mask, thereby forming the wiring groove and the connecting hole,    with one etching mask forming layer out of the three or more etching mask forming layers being formed as the mask forming layer for the wiring groove pattern and one etching mask forming layer out of the remaining layers being formed as the mask forming layer for the connecting hole pattern.    
     
     
         2 . A process for production of a semiconductor device having interlayer insulating films including an organic insulating film, said process comprising: 
 (a) a step of sequentially forming on a semiconductor substrate a first insulating film as an insulating film which the connecting hole penetrates, and a second insulating film as an interlayer insulating film for wiring,    (b) a step of sequentially forming on the second insulating film a first mask forming layer, a second mask forming layer, and a third mask forming layer, which are to be made into a first mask, a second mask, and a third mask, respectively,    (c) a step of patterning the third mask forming layer, thereby forming the third mask having the wiring groove pattern,    (d) a step of forming on the second mask forming layer including the third mask a resist mask having the connecting hole pattern,    (e) a step of etching the third mask, the second mask forming layer, and the first mask forming layer through the resist mask, and etching further the second insulating film, thereby making the connecting hole,    (f) a step of etching the second mask forming layer through the third mask, thereby forming the second mask having the wiring groove pattern and making the connecting hole to the middle of the first insulating film,    (g) a step of etching the first mask forming layer through the second mask, thereby forming the first mask having the wiring groove pattern, and etching the first insulating film remaining at the bottom of the connecting hole, thereby making the connecting hole,    (h) a step of etching the second insulating film through the first or second mask, thereby forming the wiring groove in the second insulating film, and    (i) a step of removing at least the second and third masks.    
     
     
         3 . A process for production of a semiconductor device having interlayer insulating films including an organic insulating film, said process comprising: 
 (a) a step of sequentially forming on a semiconductor substrate a first insulating film as an insulating film which the connecting hole penetrates, and a second insulating film as an interlayer insulating film for wiring,    (b) a step of sequentially forming on the second insulating film a first mask forming layer, a second mask forming layer, and a third mask forming layer, which are to be made into a first mask, a second mask, and a third mask, respectively,    (c) a step of forming on the third mask forming layer a first resist mask having the connecting hole pattern,    (d) a step of making the connecting hole in the third mask forming layer and the second mask forming layer and to the middle of the third mask forming layer through the first resist mask,    (e) a step of forming on the third mask forming layer a second resist mask having the wiring groove pattern, and etching the third mask forming layer through the second resist mask, thereby forming the third mask,    (f) a step of etching the second mask forming layer and the second insulating film through the third mask, thereby making the connecting hole,    (g) a step of etching the second mask forming layer through the third mask, thereby forming the second mask having the wiring groove pattern and etching the first insulating film to its middle, thereby making the connecting hole,    (h) a step of etching the first mask forming layer through the second mask, thereby forming the first mask having the wiring groove pattern, and etching the first insulating film, thereby making the connecting hole,    (i) a step of etching the second insulating film through the first or second mask, thereby forming the wiring groove, and    (j) a step of removing at least the second and third masks.    
     
     
         4 . The process for production of a semiconductor device as defined in  claim 2  or  3 , wherein, in step (a), the first insulating film is a methyl silsesquioxane film and the second insulating film is an organic film.  
     
     
         5 . The process for production of a semiconductor device as defined in  claim 2  or  3 , wherein, in step (b), the first, second, and third mask forming layers are formed from a material which is transparent to light.  
     
     
         6 . The process for production of a semiconductor device as defined in  claim 2  or  3 , wherein, in step (b), the first, second, and third mask forming layers are formed from a material that permits the lower mask forming layer to be formed by reactive ion etching through the mask formed on the upper mask forming layer.  
     
     
         7 . The process for production of a semiconductor device as defined in  claim 2 , wherein, in step (b), the first mask forming layer is a silicon oxide film, the second mask forming layer is a silicon nitride film, and the third mask forming layer is a silicon oxide film.  
     
     
         8 . The process for production of a semiconductor device as defined in  claim 3 , wherein, in step (b), the first mask forming layer is a silicon oxide film, the second mask forming layer is a silicon nitride film, and the third mask forming layer is an amorphous silicon film.