Transistor having high mobility channel and methods

Abstract

Methods and resulting structure of forming a transistor having a high mobility channel are disclosed. In one embodiment, the method includes providing a gate electrode including a gate material area and a gate dielectric, the gate electrode being positioned over a channel in a silicon substrate. A dielectric layer is formed about the gate electrode, and the gate material area and the gate dielectric are removed from the gate electrode to form an opening into a portion of the silicon substrate that exposes source/drain extensions. A high mobility semiconductor material, i.e., one having a carrier mobility greater than doped silicon, is then formed in the opening such that it laterally contacts the source/drain extensions. The gate dielectric and the gate material area may then be re-formed. This invention eliminates the high temperature steps after the formation of high mobility channel material used in related art methods.

1 . A method of forming a transistor having a high mobility channel, the method comprising the steps of: 
 providing a gate electrode including a gate material area and a gate dielectric, the gate electrode being positioned over a channel and source/drain extensions in a silicon substrate;    forming a dielectric layer about the gate electrode;    removing the gate material area and the gate dielectric from the gate electrode to form an opening that extends into a portion of the silicon substrate including the source/drain extensions;    forming a high mobility semiconductor material in the opening that laterally contacts the source/drain extensions in the silicon substrate; and    re-forming the gate dielectric and the gate material area.    
   
   
       2 . The method of  claim 1 , wherein the removing step includes etching to remove the gate material area and the gate dielectric from the gate electrode to form the opening to an upper surface of the silicon substrate, and then etching silicon to extend the opening into the silicon substrate including into the source/drain extensions.  
   
   
       3 . The method of  claim 1 , wherein the high mobility semiconductor material is chosen from the group consisting of: undoped silicon, silicon germanium (SiGe), germanium (Ge), indium phosphate (InP), gallium arsenic (GaAs), II-VI semiconductor material and III-V semiconductor material.  
   
   
       4 . The method of  claim 1 , wherein the high mobility semiconductor material forming step includes epitaxially growing the high mobility semiconductor material.  
   
   
       5 . The method of  claim 1 , wherein the high mobility semiconductor material forming step includes forming multiple layers of the high mobility semiconductor material.  
   
   
       6 . The method of  claim 1 , wherein in the case that the channel includes a super-steep retrograde well, the method further comprises the step of epitaxially growing an undoped silicon layer prior to forming the high mobility semiconductor material.  
   
   
       7 . The method of  claim 1 , wherein the gate dielectric includes at least one of silicon dioxide (SiO 2 ), oxynitride (ON), silicon nitride (Si 3 N 4 ) and a high dielectric constant material.  
   
   
       8 . The method of  claim 1 , wherein the gate material includes one of: in-situ doped polysilicon and a metal.  
   
   
       9 . A transistor comprising: 
 a silicon substrate including a channel and source/drain extensions;    a gate electrode including a gate material area and a gate dielectric on the silicon substrate; and    a high mobility semiconductor material layer between the gate dielectric and the channel and extending into the silicon substrate to laterally contact the source/drain extensions within the silicon substrate.    
   
   
       10 . The transistor of  claim 9 , wherein a low resistance path exists between the channel and the source/drain extensions.  
   
   
       11 . The transistor of  claim 9 , wherein the high mobility semiconductor material is chosen from the group consisting of: silicon germanium (SiGe), germanium (Ge), indium phosphate (InP), gallium arsenic (GaAs), II-VI semiconductor material and III-V semiconductor material.  
   
   
       12 . The transistor of  claim 9 , wherein the high mobility semiconductor material layer includes multiple layers.  
   
   
       13 . The transistor of  claim 9 , wherein in the case that the channel includes a super-steep retrograde well, the structure further comprises an undoped silicon layer between the high mobility semiconductor material layer and the channel.  
   
   
       14 . The transistor of  claim 9 , wherein the gate dielectric includes at least one of silicon dioxide (SiO 2 ), oxynitride (ON), silicon nitride (Si 3 N 4 ) and a high dielectric constant material.  
   
   
       15 . The transistor of  claim 9 , wherein the gate material includes one of: in-situ doped polysilicon and a metal.  
   
   
       16 . A method of forming a transistor having a high mobility channel, the method comprising the steps of: 
 removing a sacrificial gate electrode including a gate material area and a gate dielectric to form an opening into a channel in an underlying silicon substrate, the opening exposing source/drain extensions;    forming a high mobility semiconductor material in the opening that laterally contacts the source/drain extensions in the silicon substrate; and    re-forming the gate dielectric and the gate material area in the opening.    
   
   
       17 . The method of  claim 16 , wherein the removing step includes etching to remove the gate material area and the gate dielectric from the gate electrode to form the opening to an upper surface of the underlying silicon substrate, and then etching silicon to extend the opening into the underlying silicon substrate including into the source/drain extensions.  
   
   
       18 . The method of  claim 16 , wherein the high mobility semiconductor material is chosen from the group consisting of: undoped silicon, silicon germanium (SiGe), germanium (Ge), indium phosphate (InP), gallium arsenic (GaAs), II-VI semiconductor materal and III-V semiconductor material.  
   
   
       19 . The method of  claim 16 , wherein the high mobility semiconductor material forming step includes epitaxially growing the high mobility semiconductor material.  
   
   
       20 . The method of  claim 16 , wherein the high mobility semiconductor material forming step includes forming multiple layers of the high mobility semiconductor material.