Semiconductor device and method for manufacturing semiconductor device

Abstract

A semiconductor device is provided which has insulating film side wall spacers having a barrier function. The semiconductor device comprises: a gate oxide film and a gate electrode formed on and above a semiconductor substrate; source/drain regions formed in the semiconductor substrate; and first laminated side wall spacers having two or more layers and formed on side walls of the gate electrode, the first laminated side wall spacers including a nitride film as a layer other than an outermost layer, the outermost layer being made of an oxide film or an oxynitride film and having a bottom surface contacting the semiconductor substrate, the gate oxide film or a side wall spacer layer other than the nitride film.

1 . A semiconductor device comprising: 
 a semiconductor substrate;    a first gate oxide film formed on said semiconductor substrate;    a first gate electrode formed on said first gate oxide film;    first source/drain regions formed in said semiconductor substrate on both sides of said first gate electrode; and    first laminated side wall spacers having two or more layers and formed on side walls of said first gate electrode, said first laminated side wall spacers including a nitride film as a layer other than an outermost layer, the outermost layer being made of an oxide film or an oxynitride film and having a bottom surface contacting said semiconductor substrate, said first gate oxide film, or a side wall spacer layer other than said nitride film.    
     
     
         2 . The semiconductor device according to  claim 1 , further comprising a first silicide layer formed on said first source/drain regions.  
     
     
         3 . The semiconductor device according to  claim 2 , wherein said first silicide layer is a cobalt silicide layer.  
     
     
         4 . The semiconductor device according to  claim 1 , wherein the outermost layer of said first laminated side wall spacers covers side walls of said first gate oxide film, and directly contacts said semiconductor substrate.  
     
     
         5 . The semiconductor device according to  claim 1 , wherein a bottom of the outermost layer of said first laminated side wall spacers contacts said first gate oxide film, and the oxide film has an etching rate faster than an etching rate of said first gate oxide film.  
     
     
         6 . The semiconductor device according to  claim 1 , wherein said nitride film is an intermediate layer of said first laminated side wall spacers, and said first laminated side wall spacers include an oxide film or an oxynitride film formed between said nitride film and said first gate electrode and between said nitride film and said first gate oxide film.  
     
     
         7 . The semiconductor device according to  claim 6 , wherein the outermost layer of said first side wall spacers covers side walls of said first gate oxide film and directly contacts said semiconductor substrate.  
     
     
         8 . The semiconductor device according to  claim 6 , wherein the outermost layer of said first laminated side wall spacers has a bottom contacting said first gate oxide film, and the oxide film has an etching rate faster than an etching rate of said first gate oxide film.  
     
     
         9 . The semiconductor device according to  claim 1 , further comprising: 
 a laminated gate electrode structure formed on said semiconductor substrate, comprising:    a tunneling insulating film formed on said semiconductor substrate;    a floating gate electrode formed on said tunneling insulating film;    an insulating film formed on said floating gate electrode; and    a control gate electrode formed on said insulating film;    second source/drain regions formed in said semiconductor substrate on both sides of said laminated gate electrode structure; and    second laminated side wall spacers having three or more layers, formed on side walls of said laminated gate electrode structure, and including a nitride film as an intermediate layer not contacting said semiconductor substrate.    
     
     
         10 . The semiconductor device according to  claim 9 , wherein said second laminated side wall spacers include a thermally oxidized layer as an innermost layer.  
     
     
         11 . The semiconductor device according to  claim 9 , wherein said second laminated side wall spacers include an oxide film or an oxynitride film as the outermost layer whose bottom contacts said semiconductor substrate.  
     
     
         12 . A semiconductor device comprising: 
 a semiconductor substrate;    a first gate oxide film formed on said semiconductor substrate;    a first gate electrode formed on said first gate oxide film;    first source/drain regions formed in said semiconductor substrate on both sides of said first gate electrode;    first laminated side wall spacers formed on side walls of said first gate electrode;    a laminated gate electrode structure formed on said semiconductor substrate, comprising:    a tunneling insulating film formed on said semiconductor substrate;    a floating gate electrode formed on said tunneling insulating film;    an insulating film formed on said floating gate electrode; and    a control gate electrode formed on said insulating film;    second source/drain regions formed in said semiconductor substrate on both sides of said laminated gate electrode structure; and    second side wall spacers having three or more layers, formed on side walls of said laminated gate electrode structure, and including a nitride film as an intermediate layer not contacting said semiconductor substrate, and an outermost side wall spacer layer directly contacting said semiconductor substrate.    
     
     
         13 . The semiconductor device according to  claim 12 , wherein said first side wall spacers are made of same layers as outermost side wall spacer layers of said second side wall spacers.  
     
     
         14 . The semiconductor device according to  claim 12 , wherein said first side wall spacers are laminated side wall spacers having two or more layers, said first side wall spacers including a nitride film as a layer other than an outermost layer, the outermost layer being made of an oxide film or an oxynitride film and having a bottom surface contacting said semiconductor substrate, said first gate oxide film or a side wall spacer layer other than said nitride film.  
     
     
         15 . The semiconductor device according to  claim 12 , wherein the nitride film as an intermediate layer of said second side wall spacers is a silicon nitride film formed by LP-CVD.  
     
     
         16 . A method for manufacturing a semiconductor device, comprising the steps of: 
 (a) forming a gate insulating film on a semiconductor substrate;    (b) forming a conductive film on said gate insulating film;    (c) etching said conductive film to form a gate electrode and expose said gate insulating film;    (d) depositing a first insulating film having an etching selectivity relative to said gate insulating film, on a whole surface of said semiconductor substrate, and leaving first side wall spacer layers on side walls of said gate electrode by anisotropic etching;    (e) etching said gate insulating film to expose a surface of said semiconductor substrate;    (f) depositing a second insulating film on the whole surface of said semiconductor substrate, and leaving second side wall spacers on side walls of said first side wall spacers by anisotropic etching;    (g) implanting ions via said first and second side wall spacers to form source/drain regions;    (h) exposing the surface of said semiconductor substrate by using dilute hydrofluoric acid solution; and    (i) forming a silicide layer on the exposed semiconductor substrate surface.    
     
     
         17 . The method for manufacturing a semiconductor device according to  claim 16 , further comprising the step of: 
 (j) depositing a third insulating layer on the whole surface of said semiconductor substrate between said steps (c) and (d),    wherein said step (d) anisotropically etches said first and third insulating layers.    
     
     
         18 . A method for manufacturing a semiconductor device comprising the steps of: 
 (a) forming a gate insulating film on a semiconductor substrate;    (b) forming a conductive film on said gate insulating film;    (c) etching said conductive film to form a gate electrode and expose said gate insulating film;    (d) depositing a first insulating film having an etching selectivity relative to said gate insulating film, on a whole surface of said semiconductor substrate, and leaving first side wall spacer layers on side walls of said gate electrode by anisotropic etching;    (e) depositing a second insulating film having an etching rate faster than an etching rate of said gate insulating film, on the whole surface of said semiconductor substrate, and leaving second side wall spacer layers on side walls of said first side wall spacers by anisotropic etching;    (f) etching said gate insulating film to expose a surface of said semiconductor substrate;    (g) implanting ions via said first and second side wall spacers to form source/drain regions;    (h) exposing the surface of said semiconductor substrate by using dilute hydrofluoric acid solution; and    (i) forming silicide layers on the exposed semiconductor substrate surface.    
     
     
         19 . The method for manufacturing a semiconductor device according to  claim 18 , further comprising the step of: 
 (j) depositing a third insulating layer on the whole surface of said semiconductor substrate between said steps (c) and (d),    wherein said step (d) anisotropically etches said first and third insulating layers.    
     
     
         20 . A method for manufacturing a semiconductor device comprising the steps of: 
 (a) forming a tunneling insulating film, a floating gate electrode film and an insulating film on an area of a semiconductor substrate, and pattering said insulating film, said floating gate electrode film and said tunneling insulating film to form a floating gate electrode structure;    (b) forming a gate insulating film in another area of said semiconductor substrate;    (c) depositing a conductive film and an etch stopper film covering said floating gate electrode structure and said gate insulating film;    (d) etching said etch stopper film and said conductive film to form a laminated gate electrode structure of a non-volatile memory;    (e) forming a leak preventive first insulating film on side walls of said laminated gate electrode structure;    (f) depositing a silicon nitride film by LP-CVD covering said leak preventive first insulating film, and leaving first side wall spacers on side walls of said laminated gate electrode structure by anisotropic etching;    (g) removing said etch stopper film;    (h) patterning said conductive film in said another area to form a gate electrode structure;    (i) depositing a second insulating film on a whole surface of said semiconductor substrate, and leaving second side wall spacers on side walls of said laminated gate electrode structure and said gate electrode structure by anisotropic etching;    (j) exposing a surface of said semiconductor substrate by using dilute hydrofluoric acid solution; and    (k) forming silicide layers on the exposed semiconductor substrate surface.    
     
     
         21 . The method for manufacturing a semiconductor device according to  claim 20 , wherein said step (j) forms laminated side wall spacers including a silicon nitride film as an intermediate layer.