US2006158999A1PendingUtilityA1

Record carrier with two ecc block sizes, and recording method and recorder for recording such record carrier

Individually held — no corporate assignee on recordPriority: Jun 26, 2003Filed: Jun 23, 2004Published: Jul 20, 2006
Est. expiryJun 26, 2023(expired)· nominal 20-yr term from priority
G11B 20/1803H03M 13/00G11B 20/1217G11B 2020/1222H03M 13/2732G11B 2020/1288G11B 20/1866G11B 20/18G11B 2220/2541G11B 2220/2537H03M 13/2707G11B 20/1258G11B 2020/1277G11B 20/10G11B 20/12
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Claims

Abstract

On a small record carrier the inner section of the record carrier represents a significant amount of storage capacity. A regular ECC block however occupies more than one revolution of the record carrier leading to multiplication of burst errors in a single ECC block. By using two ECC block sizes the multiplication of burst errors is prevented. The transition from the small ECC blocks in the inner annular section to the large ECC blocks in the outer annular section of the disk is positioned where one ECC block from the outer annular section occupies one revolution of the record carrier. Thus an optimum division is achieved between large and small ECC blocks optimizing storage capacity and error correction capabilities.

Claims

exact text as granted — not AI-modified
1 . Record carrier comprising a first annular section with an outer perimeter comprising an first ECC block with a size and a second annular section with an inner perimeter adjacent to the outer perimeter of the first annular section, the second annular section comprising a second ECC block with a size where the size of the second ECC block is larger than the size of the first ECC block,  
       characterized in that the outer perimeter of the first annular section is located where the size of the second ECC block is equal to a length of the inner perimeter of the second annular section.  
     
     
         2 . Record carrier as claimed in  claim 1 ,  
       characterized in that the first ECC block is stored using a first error correction code and the second ECC block is stored using a second error correction code and that the first error correction code provides a error correction capability equal to the second error correction code.  
     
     
         3 . Method for recording information on a record carrier comprising the steps of 
 recording an ECC Block in a first annular section with an outer perimeter using a first ECC block size and    recording an ECC block in a second annular section with an inner perimeter adjacent to the outer perimeter of the first annular section, using a second ECC block size where the second ECC block size is larger than the first ECC block size,    characterized in that the outer perimeter of the first annular section is located where the second ECC block size is equal to a length of the inner perimeter of the second annular section.    
     
     
         4 . Method as claimed in  claim 3 ,  
       characterized in that  
       the ECC block in the first annular section is recorded using a first error correction code and the ECC block in the second annular section is recorded using a second error correction code and that the first error correcting code provides a error correction capability equal to the second error correction code.  
     
     
         5 . Recorder for recording information on a record carrier comprising a first annular section with an outer perimeter comprising an first ECC block with a size and a second annular section with an inner perimeter adjacent to the outer perimeter of the first annular section, the second annular section comprising a second ECC block with a size where the size of the second ECC block is larger than the size of the first ECC block, the recorder comprising error correction means coupled to processor means coupled to writing means characterized in that the processor means is operative to position the outer perimeter of the first annular section where the second ECC block size is equal to a length of the inner perimeter of the second annular section by providing ECC blocks to the writing means  
     
     
         6 . Recorder as claimed in  claim 5 ,  
       characterized in that  
       the processor are arranged to receive an first ECC block with a first error correction code from the error correction means when recording the first ECC block in the first annular section and processor means is further arranged to receive a second ECC block with a second error correction code from the error correction means when recording the second ECC block in the second annular section and that the error correction capability of the first error correction code is equal to the second error correcting code.

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