Semiconductor device and method for fabricating the same

Abstract

An inventive method for fabricating a semiconductor device includes the steps of: a) forming trenches in an actual element region and a dummy pattern region of a substrate by using a mask; b) depositing an insulator over the substrate, thereby forming an insulating film that fills at least the trenches; and c) removing a portion of the insulating film protruded from the trenches, thereby forming, in the trenches within the actual element region, a first embedded insulating film for isolation, and forming a second embedded insulating film in the trenches within the dummy pattern region. The dummy pattern region has dummy patterns in which no trenches are formed, and the widthwise size of each dummy pattern is four times or less of the depth of a portion of each trench provided in the substrate.

1 - 4 . (canceled)  
   
   
       5 . A method for fabricating a semiconductor device, the method comprising the steps of: 
 a) forming trenches in an actual element region and a dummy pattern region of a substrate, the actual element region including active areas, the dummy pattern region including dummy patterns;    b) depositing an insulator over the substrate, thereby forming an insulating film that fills at least the trenches; and    c) removing a portion of the insulating film protruded from the trenches, thereby forming, in the trenches within the actual element region, a first embedded insulating film for isolation, and forming, in the trenches within the dummy pattern region, a second embedded insulating film for surrounding the dummy patterns,    wherein the widthwise size of each dummy pattern is four times or less of the depth of each trench.    
   
   
       6 . The method of  claim 5 , 
 wherein each dummy pattern has a rectangular shape in plan view,    wherein a shorter side of the rectangular shape corresponds to the widthwise size of the dummy pattern, and    wherein a longer side of the rectangular shape is greater than the widthwise size of the dummy pattern by three times or more.    
   
   
       7 . The method of  claim 5 , 
 wherein the widthwise size of each dummy pattern is greater than 0 μm, and is equal to or less than 1.0 μm.    
   
   
       8 . The method of  claim 5 , 
 wherein given that regions of the substrate except the active areas are isolation regions, the proportion of the dummy patterns in the isolation regions in plan view is between or equal to 15% and 80%.    
   
   
       9 . The method of  claim 5 , 
 wherein after the step b) has been performed, portions of the insulating film located over the dummy patterns each have a triangular shape in cross section taken along the shorter side of each dummy pattern.    
   
   
       10 . The method of  claim 5 , 
 wherein in the step c), the insulating film is polished by chemical-mechanical polishing using a ceria slurry.