US2006131747A1PendingUtilityA1
Carrier with metal bumps for semiconductor die packages
Est. expiryMay 14, 2021(expired)· nominal 20-yr term from priority
Inventors:Ruben Madrid
H10W 90/754H10W 74/00H10W 72/951H10W 72/856H10W 72/551H10W 72/075H10W 90/701H10W 70/027H10W 70/05H10W 70/20H10W 72/00
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Claims
Abstract
A carrier for a semiconductor die package is disclosed. In one embodiment, the carrier includes a metal layer and a plurality of bumps formed in the metal layer. The bumps can be formed by stamping.
Claims
exact text as granted — not AI-modified1 . A carrier for a semiconductor die package, the carrier comprising:
(a) a metal layer; and (b) a plurality of bumps formed in the metal layer, wherein the carrier is for electrically coupling a semiconductor die to a circuit substrate.
2 . The carrier of claim 1 wherein the metal layer comprises copper.
3 . The carrier of claim 1 wherein the bumps in the plurality of bumps are disposed in an array and are stamped bumps.
4 . The carrier of claim 1 further comprising:
a die attach region, and wherein the bumps in the plurality of bumps are arranged around the die attach region.
5 . The carrier of claim 1 further comprising a dielectric layer, wherein the metal layer is on a dielectric layer.
6 . The carrier of claim 1 wherein the metal layer includes one or more sublayers of material on a base metal.
7 . The carrier of claim 1 wherein the metal layer is discontinuous and includes a plurality of etched conductive lines that lead to the plurality of bumps.
8 . The carrier of claim 1 wherein each bump has a conical angle of about 40 degrees of more.
9 . The carrier of claim 1 wherein each bump has a conical shape.
10 . A semiconductor die package comprising:
(a) a carrier comprising a metal layer, a die attach region, and a plurality of stamped bumps formed in the metal layer; and (b) a semiconductor die electrically coupled to the die attach region of the carrier.
11 . The die package of claim 10 wherein the bumps in the plurality of bumps are arranged around the die attach region, and wherein each of the bumps has a height that is greater than or equal to a thickness of the semiconductor die.
12 . The die package of claim 10 wherein the carrier comprises copper.
13 . The die package of claim 10 wherein the carrier comprises:
a base metal with one or more coatings on the base metal.
14 . The die package of claim 10 wherein each bump has a conical angle greater than about 40 degrees.
15 . The die package of claim 10 wherein the semiconductor die comprises a vertical metal oxide semiconductor field effect transistor (MOSFET) device.
16 . The die package of claim 10 wherein the semiconductor die comprises a vertical metal oxide semiconductor field effect transistor (MOSFET) device having a source region, a gate region, and a drain region, wherein the drain region is proximate to the die attach region of the carrier, and the source region and the gate region are distal to the die attach region of the carrier.
17 . The die package of claim 10 wherein each stamped bump has a conical shape.
18 . The die package of claim 10 wherein the bumps and the semiconductor die are at opposite sides of the carrier.
19 . The die package of claim 10 wherein the bumps and the semiconductor die are at the same side of the carrier.
20 - 28 . (canceled)
29 . A semiconductor die package comprising:
a carrier comprising a metal layer, and a plurality of stamped, conical bumps formed in the metal layer; and a semiconductor die electrically coupled to the carrier.
30 . The semiconductor die package of claim 29 wherein the metal layer comprises copper.
31 . The semiconductor die package of claim 29 wherein the metal layer comprises plated layers.
32 . The semiconductor die package of claim 29 wherein the semiconductor die comprises a power MOSFET.Join the waitlist — get patent alerts
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