Multi-level semiconductor module

Abstract

A semiconductor module is formed by alternately stacking resin boards on which semiconductor chips are mounted and sheet members having openings larger than the semiconductor chips and bonded to the resin boards. One of the resin boards located at the bottom has a thickness larger than that of each of the other resin boards. First buried conductors formed in each of first resin boards are arranged to form a plurality of lines surrounding a region on which a semiconductor chip is to be mounted. The spacing between the first buried conductors increases in succession toward the outermost line. Second buried conductors formed in each of sheet members are arranged to form a plurality of lines surrounding an opening. The spacing between the second buried conductors increases in succession toward the outermost line.

1 . A multi-level semiconductor module formed by alternately stacking one or more resin boards and one or more sheet members, each of the resin boards including a plurality of first buried conductors and having an upper face on which a semiconductor chip is mounted, each of the sheet members having an opening for accommodation of the semiconductor chip and including a plurality of second buried conductors electrically connected to the first buried conductors, wherein the first buried conductors are arranged to form a plurality of lines surrounding a mounting region on which the semiconductor chip is mounted, and 
 some of the first buried conductors forming an outer line out of the lines are arranged with spacing greater than the spacing between some of the first buried conductors forming an inner line out of the lines.    
   
   
       2 . The multi-level semiconductor module of  claim 1 , wherein the second buried conductors are arranged to form a plurality of lines surrounding the opening, and 
 some of the second buried conductors forming an outer line out of the lines are arranged with spacing greater than the spacing between some of the second buried conductors forming an inner line out of the lines.    
   
   
       3 . The multi-level semiconductor module of  claim 1 , wherein each of the sheet members includes a resin core having a thickness larger than that of at least the semiconductor chip, and 
 each of the first and second buried conductors is made of a conductive resin material capable of being deformed by compression under application of pressure.    
   
   
       4 . A multi-level semiconductor module formed by alternately stacking one or more resin boards and one or more sheet members, each of the resin boards including a plurality of first buried conductors and having an upper face on which a semiconductor chip is mounted, each of the sheet members having an opening for accommodation of the semiconductor chip and including a plurality of second buried conductors electrically connected to the first buried conductors, wherein the first buried conductors are arranged to form a plurality of lines surrounding a mounting region on which the semiconductor chip is mounted, and 
 a minimum distance between adjacent two of the lines formed by the first buried conductors increases in succession from an innermost line toward an outermost line out of the lines.    
   
   
       5 . The multi-level semiconductor module of  claim 4 , wherein the second buried conductors are arranged to form a plurality of lines surrounding the opening, and 
 a minimum distance between adjacent two of the lines formed by the second buried conductors increases in succession from an innermost line toward an outermost line out of the lines.    
   
   
       6 . A multi-level semiconductor module formed by alternately stacking one or more resin boards and one or more sheet members, each of the resin boards including a plurality of first buried conductors and having an upper face on which a semiconductor chip is mounted, each of the sheet members having an opening for accommodation of the semiconductor chip and including a plurality of second buried conductors electrically connected to the first buried conductors, wherein the first buried conductors surround a mounting region on which the semiconductor chip is mounted, and 
 the diameter of the first buried conductors increases in succession toward the mounting region.    
   
   
       7 . The multi-level semiconductor module of  claim 6 , wherein the second buried conductors surround the opening, and 
 the diameter of the second buried conductors increases toward the opening.    
   
   
       8 . The multi-level semiconductor module of  claim 7 , wherein the first buried conductors are arranged to form a plurality of lines surrounding a mounting region on which the semiconductor chip is mounted, 
 the second buried conductors are arranged to form a plurality of lines surrounding the opening,    the diameter of some of the first buried conductors forming an inner line out of the lines is larger than that of some of the first buried conductors forming an outer line out of the lines, and    the diameter of some of the second buried conductors forming an inner line out of the lines is larger than that of some of the second buried conductors forming an outer line out of the lines.    
   
   
       9 . A multi-level semiconductor module formed by alternately stacking one or more resin boards and one or more sheet members, each of the resin boards including a plurality of first buried conductors and having an upper face on which a semiconductor chip is mounted, each of the sheet members having an opening for accommodation of the semiconductor chip and including a plurality of second buried conductors electrically connected to the first buried conductors, wherein the first buried conductors are arranged to form a plurality of lines surrounding a mounting region on which the semiconductor chip is mounted, and 
 the diameter of some of the first buried conductors diagonally arranged in each of the resin boards is larger than or equal to that of the other first buried conductors and increases in succession toward the mounting region.    
   
   
       10 . The multi-level semiconductor module of  claim 9 , wherein the second buried conductors are arranged to form a plurality of lines surrounding the opening, and 
 the diameter of some of the second buried conductors diagonally arranged in each of the sheet members is larger than or equal to that of the other second buried conductors and increases in succession toward the opening.    
   
   
       11 . The multi-level semiconductor module of  claim 10 , wherein the semiconductor chip includes at least one power supply terminal and at least one ground terminal, and 
 out of the first buried conductors diagonally arranged in each of the resin boards and the second buried conductors diagonally arranged in each of the sheet members, the first buried conductors forming an inner line out of the lines and the second buried conductors forming an inner line out of the lines are connected to the ground terminal, and the first buried conductors forming an outer line out of the lines and the second buried conductors forming an outer line out of the lines are connected to the power supply terminal.    
   
   
       12 . The multi-level semiconductor module of  claim 1 , wherein each of the resin boards includes: 
 a connection terminal formed on the mounting region and connected to the semiconductor chip; and    a wire connecting one of the first buried conductors to the connection terminal.    
   
   
       13 . The multi-level semiconductor module of  claim 1 , wherein an external connection terminal is formed on a back face of one of the resin boards located at the bottom.  
   
   
       14 . The multi-level semiconductor module of  claim 1 , wherein a semiconductor memory is formed in the semiconductor chip mounted on each of the resin boards except for the resin board located at the bottom, and 
 a controlling semiconductor device for controlling the semiconductor memory is formed in the semiconductor chip mounted on the resin board located at the bottom.