Semiconductor device

Abstract

The semiconductor comprises an n-channel transistor forming region and a p-channel transistor forming region, which are disposed while being sectioned by an element isolation region. The stress caused by contact plugs in the n-channel transistor forming region and the stress caused by contact plugs in the p-channel transistor forming region are made different from each other. With this, it enables to increase the drive current of both the n-channel transistor and p-channel transistor without changing the dimensions of the active region and the element isolation region.

1 . A semiconductor device, comprising: 
 an n-channel transistor forming region;    a p-channel transistor forming region;    contact plugs formed on both said n-channel transistor forming region and said p-channel transistor forming region; and    an element isolation region which sections said n-channel transistor forming region and said p-channel transistor forming region, wherein    stress which is generated in said n-channel transistor forming region due to said contact plugs thereof and stress which is generated in said p-channel transistor forming region due to said contact plugs thereof differ from each other.    
     
     
         2 . The semiconductor device according to  claim 1 , wherein a difference between said stress in said n-channel transistor forming region and said stress in said p-channel transistor forming region is generated by adjusting number of said contact plugs per unit area.  
     
     
         3 . The semiconductor device according to  claim 2 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with compressive stress; and    said number of said contact plugs per unit area of said n-channel transistor forming region is relatively smaller with respect to number of contact plugs per unit area of a standard n-channel transistor, and said number of said contact plugs per unit area of said p-channel transistor forming region is relatively larger with respect to number of contact plugs per unit area of a standard p-channel transistor.    
     
     
         4 . The semiconductor device according to  claim 2 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with tensile stress; and    said number of said contact plugs per unit area of said n-channel transistor forming region is relatively larger with respect to number of contact plugs per unit area of a standard n-channel transistor, and said number of said contact plugs per unit area of said p-channel transistor forming region is relatively smaller with respect to number of contact plugs per unit area of a standard p-channel transistor.    
     
     
         5 . The semiconductor device according to  claim 1 , wherein a difference between said stress in said n-channel transistor forming region and said stress in said p-channel transistor forming region is generated by adjusting shape of said contact plugs.  
     
     
         6 . The semiconductor device according to  claim 5 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with compressive stress; and    diameter of said contact plugs of said n-channel transistor forming region is relatively smaller with respect to diameter of contact plugs of a standard n-channel transistor, and diameter of said contact plugs of said p-channel transistor forming region is relatively larger with respect to diameter of contact plugs of a standard p-channel transistor.    
     
     
         7 . The semiconductor device according to  claim 5 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with tensile stress; and    diameter of said contact plugs of said n-channel transistor forming region is relatively larger with respect to diameter of contact plugs of a standard n-channel transistor, and diameter of said contact plugs of said p-channel transistor forming region is relatively smaller with respect to diameter of contact plugs of a standard p-channel transistor.    
     
     
         8 . The semiconductor device according to  claim 5 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with compressive stress;    size of said contact plugs of said n-channel transistor forming region is a minimum size that is defined by a design rule; and    when comparing dimensions thereof along direction of channel orientation of said contact plugs of both said n-channel transistor forming region and said p-channel transistor forming region, said contact plugs of said p-channel transistor forming region are relatively larger with respect to said contact plugs of said n-channel transistor forming region.    
     
     
         9 . The semiconductor device according to  claim 5 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with tensile stress;    size of said contact plugs of said p-channel transistor forming region is a minimum size that is defined by a design rule; and    when comparing dimensions thereof along direction of channel orientation of said contact plugs of both said n-channel transistor forming region and said p-channel transistor forming region, said contact plugs of said n-channel transistor forming region are relatively larger with respect to said contact plugs of said p-channel transistor forming region.    
     
     
         10 . The semiconductor device according to  claim 5 , wherein: 
 both of said n-channel transistor forming region and said p-channel transistor forming region comprises a gate electrode, respectively;    said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with compressive stress;    size of said contact plugs of said n-channel transistor forming region is a minimum size that is defined by a design rule; and    when comparing dimensions thereof along longitudinal direction of said gate electrode of said contact plugs of both said n-channel transistor forming region and said p-channel transistor forming region, said contact plugs of said p-channel transistor forming region are relatively larger with respect to said contact plugs of said n-channel transistor forming region.    
     
     
         11 . The semiconductor device according to  claim 5 , wherein: 
 both of said n-channel transistor forming region and said p-channel transistor forming region comprise a gate electrode, respectively;    said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with tensile stress;    size of said contact plugs of said p-channel transistor forming region is a minimum size that is defined by a design rule; and    when comparing dimensions thereof along longitudinal direction of said gate electrode of said contact plugs of both said n-channel transistor forming region and said p-channel transistor forming region, said contact plugs of said n-channel transistor forming region are relatively larger with respect to said contact plugs of said p-channel transistor forming region.    
     
     
         12 . The semiconductor device according to  claim 1 , wherein a difference between said stress in said n-channel transistor forming region and said stress in said p-channel transistor forming region is generated by adjusting a material for forming said contact plugs.  
     
     
         13 . The semiconductor device according to  claim 12 , wherein said contact plugs of said n-channel transistor forming region are made of a material with tensile stress, and said contact plugs of said p-channel transistor forming region are made of a material with compressive stress.  
     
     
         14 . The semiconductor device according to  claim 1 , wherein: 
 said contact plugs of said n-channel transistor forming region and said contact plugs of said p-channel transistor forming region comprise barrier metal; and    a difference between said stress in said n-channel transistor forming region and said stress in said p-channel transistor forming region is generated by adjusting a material for forming said barrier metal.    
     
     
         15 . The semiconductor device according to  claim 14 , wherein said barrier metal of said n-channel transistor forming region is made of a material with tensile stress, and said barrier metal of said p-channel transistor forming region is made of a material with compressive stress.  
     
     
         16 . The semiconductor device according to  claim 1 , wherein: 
 said contact plugs of said n-channel transistor forming region and said contact plugs of said p-channel transistor forming region comprise barrier metal; and    a difference between said stress in said n-channel transistor forming region and said stress in said p-channel transistor forming region is generated by adjusting shape of said barrier metal.    
     
     
         17 . The semiconductor device according to  claim 16 , wherein: 
 said barrier metal of said n-channel transistor forming region and said barrier metal of said p-channel transistor forming region are made of a material with compressive stress; and    film thickness of said barrier metal in said n-channel transistor forming region is relatively thinner with respect to film thickness of barrier metal in a standard n-channel transistor, and film thickness of said barrier metal in said p-channel transistor forming region is relatively thicker with respect to film thickness of barrier metal in a standard p-channel transistor.    
     
     
         18 . The semiconductor device according to  claim 16 , wherein: 
 said barrier metal of said n-channel transistor forming region and said barrier metal of said p-channel transistor forming region are made of a material with tensile stress; and    film thickness of said barrier metal in said n-channel transistor forming region is relatively thicker with respect to film thickness of barrier metal in a standard n-channel transistor, and film thickness of said barrier metal in said p-channel transistor forming region is relatively thinner with respect to film thickness of barrier metal in a standard p-channel transistor.    
     
     
         19 . The semiconductor device according to  claim 5 , wherein a difference between said stress in said n-channel transistor forming region and said stress in said p-channel transistor forming region is generated by adjusting height of said contact plugs.  
     
     
         20 . The semiconductor device according to  claim 19 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with compressive stress; and    height of said contact plugs of said n-channel transistor forming region is relatively smaller with respect to height of contact plugs of a standard n-channel transistor, and height of said contact plugs of said p-channel transistor forming region is relatively larger with respect to height of contact plugs of a standard p-channel transistor.    
     
     
         21 . The semiconductor device according to  claim 19 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with tensile stress; and    height of said contact plugs of said n-channel transistor forming region is relatively larger with respect to height of contact plugs of a standard n-channel transistor, and height of said contact plugs of said p-channel transistor forming region is relatively smaller with respect to height of contact plugs of a standard p-,channel transistor.    
     
     
         22 . The semiconductor device according to  claim 1 , wherein: 
 said n-channel transistor forming region and said p-channel transistor forming region comprise a gate electrode, respectively;    said contact plugs of said n-channel transistor forming region and said contact plugs of said p-channel transistor forming region comprise barrier metal, respectively; and    a difference between said stress in said n-channel transistor forming region and said stress in said p-channel transistor forming region is generated by adjusting isolated distance between said contact plugs and said gate electrode.    
     
     
         23 . The semiconductor device according to  claim 22 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with compressive stress; and    said isolated distance between said contact plugs of said n-channel transistor forming region and said gate electrode of said n-channel transistor forming region is relatively wider with respect to isolated distance of a standard n-channel transistor, and said isolated distance between said contact plugs of said p-channel transistor forming region and said gate electrode of said p-channel transistor forming region is relatively narrower with respect to isolated distance of a standard p-channel transistor.    
     
     
         24 . The semiconductor device according to  claim 22 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with tensile stress; and    said isolated distance between said contact plugs of said n-channel transistor forming region and said gate electrode of said n-channel transistor forming region is relatively narrower with respect to isolated distance of a standard n-channel transistor, and said isolated distance between said contact plugs of said p-channel transistor forming region and said gate electrode of said p-channel transistor forming region is relatively wider with respect to isolated distance of a standard p-channel transistor.    
     
     
         25 . The semiconductor device according to  claim 22 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with compressive stress; and    said isolated distance between said contact plugs of said n-channel transistor forming region and said gate electrode of said n-channel transistor forming region is a widest distance that is defined by a design rule, and said isolated distance between said contact plugs of said p-channel transistor forming region and said gate electrode of said p-channel transistor forming region is a narrowest distance that is defined by said design rule.    
     
     
         26 . The semiconductor device according to  claim 22 , wherein: 
 said contact plugs in said n-channel transistor forming region and said contact plugs in said p-channel transistor forming region are made of a material with tensile stress; and    said isolated distance between said contact plugs of said n-channel transistor forming region and said gate electrode of said n-channel transistor forming region is a narrowest distance that is defined by a design rule, and said isolated distance between said contact plugs of said p-channel transistor forming region and said gate electrode of said p-channel transistor forming region is a widest distance that is defined by said design rule.