Structures and methods for enhancing capacitors in integrated circuits
Abstract
Systems, devices, structures, and methods are described that inhibit dielectric degradation at high temperatures. An enhanced capacitor is discussed. The enhanced capacitor includes a first electrode, a dielectric that includes ditantalum pentaoxide, and a second electrode having a compound. The compound includes a first substance and a second substance. The second electrode includes a trace amount of the first substance. The morphology of the semiconductor structure remains stable when the trace amount of the first substance is oxidized during crystallization of the dielectric. In one embodiment, the crystalline structure of the dielectric describes substantially a (001) lattice plane.
Claims
exact text as granted — not AI-modified1 . A semiconductor structure comprising:
a metallization layer; a first conductive layer directly contacting the metallization layer, the conductive layer including a first compound, the first compound including a first substance and a second substance; an insulator layer formed directly on the first conductive layer, the insulator layer including a second compound; and a second conductive layer formed directly on the insulator layer.
2 . The semiconductor structure of claim 1 , wherein the first conductive layer further includes the first substance separated from the first compound of the first substance and the second substance.
3 . The semiconductor structure of claim 1 , wherein the first compound includes ruthenium and oxygen.
4 . The semiconductor structure of claim 3 , wherein the second compound includes tantalum and oxygen.
5 . The semiconductor structure of claim 4 , wherein the metallization layer includes polysilicon.
6 . The semiconductor structure of claim 4 , wherein the first conductive layer further includes ruthenium separated from the first compound of ruthenium and oxygen.
7 . The semiconductor structure of claim 1 , wherein the first compound includes a substantial amount of the second substance for inhibiting diffusion of the second compound from the insulator layer.
8 . The semiconductor structure of claim 1 , wherein the second conductive layer includes a conductive portion formed below a surface of the first conductive layer.
9 . A semiconductor structure comprising:
a metallization layer directly contacting a substrate; a first conductive layer directly contacting the metallization layer, the conductive layer including a first compound, the first compound including a metal substance and a nonmetal substance; an insulator layer formed directly on the first conductive layer, the insulator layer including a second compound, the second compound including a metal substance and a nonmetal substance; and a second conductive layer formed directly on the insulator layer.
10 . The semiconductor structure of claim 9 , wherein the metal substance of the first compound includes ruthenium.
11 . The semiconductor structure of claim 10 , wherein the metal substance of the second compound includes tantalum.
12 . The semiconductor structure of claim 11 , wherein the nonmetal substance of the first compound includes oxygen.
13 . The semiconductor structure of claim 12 , wherein the nonmetal substance of the second compound includes oxygen.
14 . The semiconductor structure of claim 13 , wherein the first compound includes a substantial amount of the oxygen for inhibiting diffusion of the second compound from the insulator layer.
15 . The semiconductor structure of claim 14 , wherein the second conductive layer includes a first conductive portion and a second conductive portion uniformly formed with the first conductive portion, and wherein one of the first and second conductive portions is surrounded by the first conductive layer.
16 . A semiconductor structure comprising:
a transistor; and a capacitor coupled to the transistor via a region of a substrate, the capacitor including: a capacitor plug coupled to the region of the substrate; a first capacitor electrode directly contacting the capacitor plug, the first capacitor electrode including a first compound, the first compound including a first substance and a second substance; a capacitor dielectric layer formed directly on the first capacitor electrode, the capacitor dielectric including a second compound; and a second capacitor electrode formed directly on the capacitor dielectric.
17 . The semiconductor structure of claim 16 , wherein the first compound includes ruthenium and oxygen.
18 . The semiconductor structure of claim 17 , wherein the second compound includes tantalum and oxygen.
19 . The semiconductor structure of claim 16 , wherein the capacitor plug is above a surface of the substrate.
20 . The semiconductor structure of claim 16 , wherein the transistor includes a first source/drain region formed in the substrate, a second source/drain region formed in the substrate, and a gate formed above the substrate for controlling the transistor for transferring a charge between the capacitor and one of the first and second source/drain regions.
21 . The semiconductor structure of claim 20 , wherein the second capacitor electrode includes a first conductive portion and a second conductive portion uniformly formed with the first conductive portion, and wherein one of the first and second conductive portions is surrounded by the first capacitor electrode.
22 . A system comprising:
a processor; and a dynamic random access memory device coupled to the processor, the dynamic random access memory device including a plurality of memory cells, at least one of the memory cells including: a transistor; and a capacitor coupled to the transistor via a region of a substrate, the capacitor including:
a capacitor plug coupled to the region of the substrate;
a first capacitor electrode directly contacting the capacitor plug, the first capacitor electrode including a first compound, the first compound including a first substance and a second substance;
a capacitor dielectric layer formed directly on the first capacitor electrode, the capacitor dielectric including a second compound; and a second capacitor electrode formed directly on the capacitor dielectric.
23 . The system of claim 22 , wherein the first compound includes RuOx, wherein x is a number of atoms.
24 . The system of claim 23 , wherein the second compound includes ditantalum pentaoxide.
25 . The system of claim 24 , wherein the transistor includes a first source/drain region formed in the substrate, a second source/drain region formed in the substrate, and a gate formed above the substrate for controlling the transistor for transferring a charge between the capacitor and a bit line of the memory device via the first and second source/drain regions.
26 . The system of claim 25 , wherein the capacitor plug is above a surface of the substrate.
27 . The system of claim 26 , wherein the second capacitor electrode includes a conductive portion formed below a surface of the first capacitor electrode.
28 . A method comprising:
transferring a charge in a semiconductor structure, the semiconductor structure including a metallization layer, a first conductive layer directly contacting the metallization layer, the conductive layer including a first compound, the first compound including a first substance and a second substance, an insulator layer formed directly on the first conductive layer, the insulator layer including a second compound, and a second conductive layer formed directly on the insulator layer.
29 . The method of claim 28 , wherein the first conductive layer further includes the first substance separated from the first compound of the first substance and the second substance.
30 . The method of claim 28 , wherein the first compound includes ruthenium and oxygen.
31 . The method of claim 30 , wherein the second compound includes tantalum and oxygen.
32 . The method of claim 31 , wherein the first conductive layer further includes ruthenium separated from the first compound of ruthenium and oxygen.Join the waitlist — get patent alerts
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