Multi-chip module having bonding wires and method of fabricating the same

Abstract

Provided herein are multi-chip modules (MCMs) having bonding wires and fabrication methods thereof. The multi-chip module includes a substrate and a plurality of chips sequentially stacked. At least one top chip, stacked above a lowest chip, has an insulating film that covers the backside thereof. Also, each of the stacked chips has bonding pads formed on the periphery or edges of its upper surface. At least one insulator is interposed between the stacked chips. The insulator exposes the pads on the underlying chip. The pads of the respective chips are connected to a set of interconnections, which are disposed on the substrate. This configuration of stacked chips enables the overall height of the memory module to be reduced because the insulating film prevents the bonding wires from contacting the substrate of the top chips.

1 . A method of fabricating a multi-chip module, the method comprising: 
 preparing a substrate having first and second groups of interconnections formed on a top surface thereof;    mounting a bottom chip on the top surface, the bottom chip having pads formed thereon;    forming a first group of bonding wires that connect the pads of the bottom chip to the first group of interconnections;    attaching an insulator on an upper surface of the bottom chip, the insulator being surrounded by the pads of the bottom chip; and    mounting a top chip on the insulator, the top chip including a insulating tape attached to a backside thereof, the top chip having pads formed thereon.    
     
     
         2 . The method of  claim 1  further comprising: 
 forming a second group of bonding wires that connect the pads of the top chip to the second group of interconnections.    
     
     
         3 . The method of  claim 1  further comprises providing an adhesive on the substrate before mounting the bottom chip on the substrate, the bottom chip being fixed to the substrate by the adhesive.  
     
     
         4 . The method of  claim 1  further comprises forming bumps on the pads of the bottom chip before forming the first group of bonding wires, the first group of bonding wires being connected to the bumps on the pads of the bottom chip.  
     
     
         5 . The method of  claim 4 , wherein the first group of bonding wires are formed using a bump reverse bonding technique.  
     
     
         6 . The method of  claim 1  further comprises forming bumps on the pads of the top chip before forming the second group of bonding wires, the second group of bonding wires being connected to the bumps on the pads of the top chip.  
     
     
         7 . The method of  claim 1  further comprises forming an epoxy molding compound that encapsulates the bottom chip, the top chip and the bonding wires.  
     
     
         8 . The method of  claim 1 , wherein the pads are formed on edges of the top surfaces of the chips.  
     
     
         9 . The method of  claim 1 , wherein the insulator is attached on a central region of the bottom chip, thereby having a width smaller than the bottom chip and the top chip.