US2006113621A1PendingUtilityA1

Methods for aligning semiconductor fabrication molds and semiconductor substrates

Individually held — no corporate assignee on recordPriority: Mar 12, 2002Filed: Jan 6, 2006Published: Jun 1, 2006
Est. expiryMar 12, 2022(expired)· nominal 20-yr term from priority
Inventors:James Hofmann
G03F 7/0002B82Y 10/00G03F 9/00Y10S438/951B82Y 40/00H10W 74/129H10W 74/00H10W 72/9415H10W 72/9223H10W 72/942H10W 72/923H10W 72/251H10W 20/49H10W 20/48H10W 72/012H10W 20/084H10W 20/081H10W 20/071H10W 70/656H10W 72/019H10W 20/091
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Claims

Abstract

The invention includes methods of forming patterns in low-k dielectric materials by contact lithography. In a particular application, a mold having a first pattern is pressed into a low-k dielectric material to form a second pattern within the material. The second pattern is substantially complementary to the first pattern. The mold is then removed from the low-k dielectric material. The invention also includes a method of forming a mold; and includes a mold configured to pattern a mass over a semiconductor substrate during contact lithography of the mass.

Claims

exact text as granted — not AI-modified
1 - 44 . (canceled)  
     
     
         45 . A method for aligning a semiconductor fabrication mold and a semiconductor substrate comprising: 
 providing a semiconductor fabrication mold having a first alignment article associated therewith;    providing a semiconductor substrate within a substrate holder, the holder having a second alignment article associated therewith, the semiconductor substrate having a non-photoresist material thereover; and    aligning the first alignment article of the semiconductor fabrication mold relative to the second alignment article of the holder, the non-photoresist material being between the mold and the substrate during the aligning.    
     
     
         46 . The method of  claim 45  wherein the first article comprises a pin and the second article comprises a receptacle, the aligning comprising mating the pin with the receptacle.  
     
     
         47 . The method of  claim 45  further comprising utilizing the mold to form a pattern in the non-photoresist material.  
     
     
         48 . The method of  claim 45  further comprising, after aligning the first and second alignment articles with one another, pressing the mold relative to the non-photoresist material to form a reverse image of at least a portion of the pattern of the mold within the non-photoresist material.  
     
     
         49 . The method of  claim 45  wherein one of the first and second alignment articles is a pin and the other of the first and second alignment articles is a receptacle; and wherein the aligning comprises mating the pin within the receptacle.  
     
     
         50 . The method of  claim 45  wherein: 
 the second alignment article is a first optical pattern, the first optical pattern being supported by the holder;    the mold comprises a substantially transparent portion and a second optical pattern within the substantially transparent portion; and    the aligning comprises aligning the first and second optical patterns relative to one another.    
     
     
         51 . The method of  claim 45  wherein the semiconductor fabrication mold comprises a siloxane material  
     
     
         52 . The method of  claim 45  wherein the non-photoresist material comprises a low-k dielectric material.  
     
     
         53 . The method of  claim 52  wherein the low-k dielectric material comprises a low-k polymer.

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