Carrier for substrate film

Abstract

The invention relates to a carrier for supporting a substrate film during the chip-substrate assembly and bonding process. The carrier provides enhanced rigidity to the substrate film. The degree of rigidity and/or flexibility provided can be controlled by selection of the carrier dimensions, configuration and material choice. Advantages of embodiments of the carrier include easier handling, reduced probability of defective end products, and increased control in choosing the thinness of the substrate film. For example, the substrate film carrier can be used for lead-over-chip (LOC) assemblies and lead-under-chip (LUC) assemblies to create ball grid arrays (BGA), pin grid arrays (PGA), dual in-line packages (DIP), and the like.

1 . An assembly, comprising: 
 a film including a plurality of substrate units with said plurality of substrate units being electrically interfaced with a plurality of dies, each one of said substrate units including a substantially central cavity adapted to receive wires from a corresponding die which connect to a first surface of said film, said dies being attached to a second surface of said film with said second surface being opposed to said first surface; and    a carrier in mechanical communication with said first surface of said film for providing enhanced rigidity to said film by being sized and configured to add material at selected regions of said film, wherein said carrier is removed from said assembly upon completion of at least a portion of a process of manufacturing die packages.    
     
     
         2 . The assembly of  claim 1 , wherein said carrier is a temporary carrier.  
     
     
         3 . The assembly of  claim 1 , wherein said carrier further comprises a plurality of cross bars and wherein each cross bar is located near a substrate set.  
     
     
         4 . The assembly of  claim 1 , wherein said plurality of dies comprise lead-over-chips (LOC).  
     
     
         5 . The assembly of  claim 1 , wherein said carrier comprises at least two discrete layers with each layer comprising a different material.  
     
     
         6 . The assembly of  claim 5 , wherein said carrier comprises at least one indexing hole that extends through said layers.  
     
     
         7 . The assembly of  claim 6 , wherein said at least one indexing hole is located on a side bar of said carrier.  
     
     
         8 . An assembly, comprising: 
 a plurality of semiconductors;    a tape comprising a plurality of substrate units with each being flanked by a pair of slots to facilitate removal, each of said substrate units having a first surface to which lead wires from a respective one of said semiconductors are connected and a second opposed surface to which a respective one of said semiconductors is attached so that corresponding substrate units and corresponding semiconductors are in electrical communication; and    a temporary carrier connected to a first surface of said flexible tape, said temporary carrier comprising a plurality of cross bars with adjacent cross bars having at least one of said substrate units therebetween, wherein said cross bars are separated from said assembly during manufacture of individual semiconductor packages.    
     
     
         9 . The assembly of  claim 8 , wherein said tape further comprises cross rails that are substantially aligned with said cross bars.  
     
     
         10 . The assembly of  claim 8 , wherein said tape and said carrier comprise an integral unit.  
     
     
         11 . The assembly of  claim 10 , wherein said tape and said carrier are molded to form said integral unit.  
     
     
         12 . The assembly of  claim 8 , wherein said carrier further comprises a pair of spaced teeth between adjacent slots such that each of said substrate units is generally circumscribed by a respective pair of said teeth and a respective pair of said slots.  
     
     
         13 . The assembly of  claim 12 , wherein said teeth are substantially aligned with projecting portions of said tape.  
     
     
         14 . The assembly of  claim 12 , wherein a respective one of said teeth is between a pair of notches formed in said carrier.  
     
     
         15 . The assembly of  claim 8 , in combination with a plurality of encapsulating devices to form a plurality of ball grid array (BGA) packages.  
     
     
         16 . An assembly, comprising: 
 a plurality of semiconductor chips;    a film comprising a first side rail, a second side rail and a plurality of substrate units therebetween, said film comprising a first surface and a second surface, each of said substrate units including a generally central cavity, each of said chips being electrically interfaced with a corresponding substrate unit by wires which pass through respective cavities and are connected to said first surface, said chips being connected to said second surface, said first side rail including a plurality of spaced first projecting portions and said second side rail including a plurality of spaced second projecting portions, a respective one of said first projecting portions and a respective one of a said second projecting portions generally defining two edges of a respective one of said substrate units; and    a carrier in mechanical communication with said film to support said film during assembly and bonding of said substrate units and said chips, said carrier being on said first surface of said film, said carrier comprising a first side bar substantially aligned with said first side rail of said film and a second side bar substantially aligned with said second rail of said film, said first side bar including a plurality of spaced first teeth substantially aligned with said first projecting portions and said second side bar including a plurality of second teeth substantially aligned with said second projecting portions.    
     
     
         17 . The assembly of  claim 16 , wherein said carrier comprises BT resin.  
     
     
         18 . The assembly of  claim 16 , wherein said carrier comprises a plurality of layers.  
     
     
         19 . The assembly of  claim 18 , wherein said layers comprise at least one of copper, polyimide and solder resist.  
     
     
         20 . The assembly of  claim 16 , wherein said carrier further comprises cross bars which are removed from said assembly upon completion of at least a portion of a process of manufacturing chip packages.