Structure of thermal resistive layer and the method of forming the same

Abstract

The prevent invention discloses a structure of thermal resistive layer and the method of forming the same. The thermal resistive structures, formed on a plastic substrate, comprises a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure, and a buffer layer, formed on said porous layer, wherein said porous layer can protect said plastic substrate from damage caused by the heat generated during manufacturing process. With the structure and method disclosed above, making a thin film transistor and forming electronic devices on the plastic substrate in the technology of Low Temperature PolySilicon, i.e. LTPS, without changing any parameters is easy to carry out.

1 . A structure of thermal resistive layer formed on a plastic substrate, comprising: 
 a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure; and    a buffer layer, formed on said porous layer;    wherein said porous layer can protect said plastic substrate from damage caused by the heat generated during manufacturing process.    
   
   
       2 . The structure according to  claim 1 , wherein said oxide of hollow structure is a material selected from the group consisting of silicon oxide, titanium oxide, zinc oxide, and aluminum oxide.  
   
   
       3 . The structure according to  claim 1 , wherein the shape of said oxide of hollow structure is selected from the group consisting of sphere, column, and disk.  
   
   
       4 . The structure according to  claim 3 , wherein the distribution of said oxides of hollow structure in column shape are standing on said plastic substrate.  
   
   
       5 . The structure according to  claim 3 , wherein the distribution of said oxides of hollow structure in column shape are lying flat on said plastic substrate.  
   
   
       6 . The structure according to  claim 1 , further comprising a template layer, formed between said plastic substrate and said porous layer, wherein said template layer is a material selected from the group consisting of silicon, titanium, zinc, and aluminum.  
   
   
       7 . The structure according to  claim 6 , further comprising a conductive layer, formed between said plastic substrate and said template layer.  
   
   
       8 . The structure according to  claim 7 , wherein said conductive layer is substantially an indium tin oxide.  
   
   
       9 . The structure according to  claim 7 , further comprising a planarization layer, formed between said porous layer and said buffer layer.  
   
   
       10 . The structure according to  claim 9 , wherein said planarization layer is a material selected from the group consisting of polymer, and inorganic materials.  
   
   
       11 . The structure according to  claim 1 , wherein said buffer layer is substantially a silicon oxide.  
   
   
       12 . The structure according to  claim 1 , further comprising an amorphous layer formed on said buffer layer and said amorphous layer is transformed into polycrystalline silicon layer through a heat process.  
   
   
       13 . A method for forming a structure of thermal resistive layer on a plastic substrate comprising the steps of: 
 forming a plurality of oxides of hollow structure on an anodized template;    removing said anodized template;    forming a porous layer by coating said plurality of oxides of hollow structure on said plastic substrate; and    forming a buffer layer on said porous layer.    
   
   
       14 . The method according to  claim 13 , wherein said coating process is accomplished by processing said oxides of hollow structure through the way of sol-gel and then coating on said plastic substrate by spin coating.  
   
   
       15 . The method according to  claim 13 , wherein said anodized template is a material selected from the group consisting of silicon, titanium, zinc and aluminum.  
   
   
       16 . The method according to  claim 13 , wherein said oxide of hollow structure is a material selected from the group consisting of silicon oxide, titanium oxide, zinc oxide, and aluminum oxide.  
   
   
       17 . The method according to  claim 13 , wherein the shape of said oxide of hollow structure is selected from the group consisting of sphere, column, and disk.  
   
   
       18 . The method according to  claim 13 , wherein said buffer layer is substantially a silicon oxide.  
   
   
       19 . A method for forming a structure of thermal resistive layer on a plastic substrate comprising the steps of: 
 forming a material layer on said plastic substrate;    transforming said material layer into a porous template layer with a specific thickness by anodizing ; and    forming a buffer layer on said porous template layer.    
   
   
       20 . The method according to  claim 19 , wherein said buffer layer is substantially a silicon oxide.  
   
   
       21 . The method according to  claim 19 , further comprising forming a planarization layer between said buffer layer and said porous template layer.  
   
   
       22 . The method according to  claim 21 , wherein said planarization layer is a material selected from the group consisting of polymer, and inorganic material.  
   
   
       23 . The method according to  claim 19 , wherein said material layer is a material selected from the group consisting of silicon, titanium, zinc, and aluminum.  
   
   
       24 . The method according to  claim 19 , wherein said porous template layer further comprises a plurality of oxides of hollow structure which are material selected from the group consisting of silicon oxide, titanium oxide, zinc oxide, and aluminum oxide.  
   
   
       25 . The method according to  claim 24 , wherein the shape of said oxide of hollow structure is selected from the group consisting of sphere, column, and disk.  
   
   
       26 . The method according to  claim 19 , further comprising a conductive layer formed between said plastic substrate and said material layer.  
   
   
       27 . The method according to  claim 26 , wherein said conductive layer is substantially an indium tin oxide.