US2006088971A1PendingUtilityA1

Integrated inductor and method of fabrication

Individually held — no corporate assignee on recordPriority: Oct 27, 2004Filed: Oct 27, 2004Published: Apr 27, 2006
Est. expiryOct 27, 2024(expired)· nominal 20-yr term from priority
H05K 2201/086H05K 1/0373H05K 1/165H05K 3/4644H05K 2201/09563H01F 41/046H01F 17/0033H10W 90/724H10W 72/07251H10W 72/20H10W 70/685H10W 44/501H10D 1/20
43
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Claims

Abstract

An inductor structure comprised of a magnetic section and a single turn solenoid. The single turn solenoid to contain within a portion of the magnetic section and circumscribed by the magnetic section.

Claims

exact text as granted — not AI-modified
1 . An inductor comprising: 
 an open conductive loop; and    a magnetic material contained within said open conductive loop and to encompass said open conductive loop.[ HB   6 ]   
     
     
         2 . The inductor of  claim 1  wherein said magnetic material is a soft magnetic material with a relative permeability of about 95-900.  
     
     
         3 . The inductor of  claim 1  wherein said open conductive loop consists of copper.  
     
     
         4 . The inductor of  claim 3  wherein said inductor is integrated into a build-up packaging layer of an integrated circuit package.  
     
     
         5 . The inductor of  claim 4  coupled to a voltage regulator module and to a circuit die.  
     
     
         6 . An inductor structure comprising: 
 a magnetic section; and    a single turn solenoid to contain within a portion of said magnetic section and circumscribed by said magnetic section.    
     
     
         7 . The inductor structure of  claim 6  formed within a build-up packaging layer of an integrated chip package.  
     
     
         8 . The inductor structure of  claim 7  coupled to another layer contained within the integrated chip package.  
     
     
         9 . The inductor structure of  claim 6  wherein said single turn solenoid consists of copper.  
     
     
         10 . The inductor structure of  claim 6  wherein said magnetic layer is a magneto-dielectric.  
     
     
         11 . The inductor structure of  claim 6  used in conjunction with power conversion circuitry.  
     
     
         12 . An inductor structure comprising: 
 a core with magnetic properties;    a conductive layer having a first end and a second end, said conductive layer wrapped around said core to form a gap between said first end and said second end; and    an outer material having magnetic properties and wrapped around said conductive layer in the longitudinal axis of said conductive layer.    
     
     
         13 . The inductor structure of  claim 12  wherein said conductive layer consists of copper.  
     
     
         14 . The inductor structure of  claim 12  wherein said core and said outer material are formed of a magneto-dielectric having a relative permeability of about 300.  
     
     
         15 . The inductor structure of  claim 13  incorporated into a smoothing filter of a power converter.  
     
     
         16 . The inductor structure of  claim 15  fabricated in a build-up packaging layer of an integrated circuit package.  
     
     
         17 . An inductor comprising: 
 an outer magnetic layer;    a conductive layer having a first end and a second end, said conductive layer partially circumscribed by said outer magnetic layer in the longitudinal plane; and    a magnetic core circumscribed by said conductive layer with a gap between said first end and said second end of said conductive layer, said magnetic core coupled to said outer magnetic layer.    
     
     
         18 . The inductor of  claim 17  wherein the conductive layer consists of copper.  
     
     
         19 . The inductor of  claim 17  fabricated into a build-up packaging layer of an integrated circuit package.  
     
     
         20 . The inductor of  claim 19  coupled to power conversion circuitry.  
     
     
         21 . An inductor comprising: 
 a magnetic layer;    a bottom conductive layer formed below said magnetic layer;    a pair of opposite conductive sidewalls formed through said magnetic layer to define a magnetic core there between;    a first conductive lip formed on one of said pair of conductive sidewalls over said magnetic core; and    a second conductive lip formed on one of said pair of conductive sidewalls over said magnetic core.    
     
     
         22 . The inductor of  claim 21  wherein said magnetic layer has a permeability of approximately 300.  
     
     
         23 . The inductor of  claim 21  wherein said conductive sidewalls are an array of vias.  
     
     
         24 . The inductor of  claim 21  formed in a build-up packaging layer of an integrated circuit package.  
     
     
         25 . The inductor of  claim 24  coupled to power conversion circuitry and an integrated circuit die.  
     
     
         26 . An inductor comprising: 
 a conductor layer;    a magnetic layer formed over said conductor layer;    a first conductive sidewall formed through said magnetic layer to adjoin with said conductor layer;    a second conductive sidewall formed through said magnetic layer to adjoin with said conductive layer, said first conductive sidewall and said second conductive sidewall having a portion of said magnetic layer there between;    a first conductive lip formed on said first conductive sidewall over said magnetic core; and    a second conductive lip formed on said second conductive sidewall over said magnetic core.    
     
     
         27 . The inductor of  claim 26  wherein said first conductive sidewall and second conductive sidewall are formed by vias.  
     
     
         28 . The inductor of  claim 27  wherein said conductive layer, said first conductive sidewall, said second conductive sidewall, said first conductive lip, and said second conductive lip are formed of copper.  
     
     
         29 . The inductor of  claim 28  wherein said magnetic layer is a soft magnetic material having a permeability of approximately 95-900.  
     
     
         30 . The inductor of  claim 26  wherein said magnetic layer is composed of a plurality of magnetic granules in a polymer host.  
     
     
         31 . An inductor structure included in an inductor array comprising: 
 a magnetic material divided into a plurality of sections; and    a plurality of single turn solenoids each circumscribed by one of said plurality of sections with a portion of magnetic material contained within each of said single turn solenoids.    
     
     
         32 . The inductor array of  claim 31  wherein said plurality of sections are separated from each other by a dielectric material.  
     
     
         33 . The inductor array of  claim 31  formed in a build-up packaging layer of an integrated circuit package.  
     
     
         34 . The inductor array of  claim 33  wherein one of said plurality of single turn solenoids is coupled to an integrated circuit device.  
     
     
         35 . An inductor structure formed into an array comprising: 
 a plurality of conductive layers;    a plurality of magnetic layers formed over said conductive layers;    a plurality of conductive sidewall pairs formed through said plurality of magnetic layers to couple to said plurality of conductive layers and to define a magnetic core between each pair of said plurality of conductive sidewall pairs; and    a plurality of conductive lip pairs coupled to each of said plurality of conductive sidewall pairs to partially cover said magnetic core.    
     
     
         36 . The inductor structure formed into an array of  claim 35  further comprising dielectric material formed to isolate each of said plurality of magnetic layers  
     
     
         37 . The inductor structure formed into an array of  claim 36  wherein said dielectric material is selected from a group consisting of an Ajinomoto buildup film (ABF), a ceramic and a solder resist.  
     
     
         38 . The inductor structure formed into an array of  claim 35  formed within a build-up layer of an integrated circuit package substrate.  
     
     
         39 . The inductor structure formed into an array of  claim 36  coupled to power conversion circuitry.  
     
     
         40 . A method of forming an inductor structure comprising: 
 forming an open conductive loop; and    forming a magnetic material contained within said open conductive loop and to encompass said open conductive loop.    
     
     
         41 . A method of forming an inductor structure of  claim 40  used to form an inductor in a build-up packaging layer of an integrated circuit package.  
     
     
         42 . A method of forming an inductor structure of  claim 40  coupled to an integrated device.  
     
     
         43 . A method of forming an inductor comprising: 
 forming a magnetic layer; and    forming a single turn solenoid to contain within a portion of said magnetic layer and circumscribed by said magnetic layer.    
     
     
         44 . The method of  claim 43  wherein said magnetic layer consists of CoFHfO.  
     
     
         45 . The method of  claim 43  wherein said single turn solenoid consists of copper.  
     
     
         46 . The method of  claim 45  used to form an inductor in a build-up packaging layer of an integrated circuit package.  
     
     
         47 . The method of  claim 43  wherein the magnetic layer is formed by a laminating technique.  
     
     
         48 . A method of forming an inductor comprising: 
 forming a metal layer;    shaping said metal layer to form a bowl shape; and    forming a magnetic layer onto and around said metal layer.    
     
     
         49 . The method of  claim 48  wherein said metal layer consists of copper.  
     
     
         50 . The method of  claim 48  wherein said magnetic layer is formed by a sputtering technique.  
     
     
         51 . The method of  claim 48  wherein said magnetic layer has a permeability of about 300.  
     
     
         52 . The method of  claim 51  used to form an inductor in a build-up packaging layer of an integrated circuit package and coupled to an integrated device.  
     
     
         53 . A method of forming an inductor structure comprising: 
 forming a first conductive layer;    forming a magnetic layer over said first conductive layer;    forming a first conductive sidewall and a second conductive sidewall through said magnetic layer and adjoined to said first conductive layer;    forming a first conductive portion adjoined to said first conductive sidewall, said first conductive portion formed opposite said magnetic layer from said first conductive layer; and    forming a second conductive portion adjoined to said second conductive sidewall, said second portion formed opposite said magnetic layer from said first conductive layer.    
     
     
         54 . The method of forming an inductor structure of  claim 53  further comprising planarizing said magnetic layer.  
     
     
         55 . The method of forming an inductor structure of  claim 53  wherein the first conductive layer is formed by an electroplating technique.  
     
     
         56 . The method of forming an inductor structure of  claim 53  wherein said first conductive sidewall and said second conductive sidewall are formed by vias.  
     
     
         57 . A method of forming an inductor on a package substrate, said method comprising: 
 forming a first seed layer on the package substrate;    electroplating a first conductive layer on said substrate;    depositing a layer having magnetic properties over said first conductive layer;    laser drilling a via array in said layer having magnetic properties to form opposite first and second sidewalls coupled to said first conductive layer;    forming a second seed layer on said via array and said layer having magnetic properties;    forming a dry film resist over said second seed layer;    creating openings in said dry film resist in predetermined locations;    electroplating a second conductive layer in said openings; and    removing said dry film resist and said second seed layer.    
     
     
         58 . The method of  claim 57  used to form an inductor coupled to an integrated circuit die and a voltage regulator module.  
     
     
         59 . The method of  claim 58 , wherein said layer having magnetic properties is a magneto-dielectric material with a relative permeability of approximately 300.  
     
     
         60 . A method of forming an inductor structure into an array comprising: 
 forming a plurality of magnetic sections; and    forming a plurality of single turn solenoids, each one of said plurality of single turn solenoids to contain within a portion of one of said plurality of said magnetic sections and circumscribed by one of said plurality of magnetic sections.    
     
     
         61 . The method of forming an inductor structure into an array of  claim 60  further including the step of forming a dielectric material between said plurality of magnetic sections.  
     
     
         62 . The method of forming an inductor structure into an array of  claim 61  wherein said dielectric material is selected from a group consisting of an Ajinomoto buildup film (ABF), a ceramic, and a solder resist.  
     
     
         63 . The method of forming an inductor structure into an array of  claim 62  wherein said plurality of magnetic sections is formed from a magneto-dielectric.  
     
     
         64 . The method of forming an inductor structure into an array of  claim 60  used to form an inductor array used in conjunction with a voltage regulator module array.  
     
     
         65 . A method of forming an inductor structure included in an inductor array comprising: 
 forming a plurality of first conductive layers;    forming a plurality of magnetic sections over said plurality of first conductive layers;    forming a plurality of first conductive sidewalls and a plurality of second conductive sidewalls through said magnetic sections, each one of said plurality of first and second conductive sidewalls adjoined to one of said plurality of first conductive layers;    forming a plurality of first conductive portions, each one of said plurality of first conductive portions adjoined to one of said plurality of first conductive sidewalls, each one of said plurality of first conductive portions formed opposite one of said plurality of magnetic sections from one of said plurality of first conductive layers; and    forming a plurality of second conductive portions, each one of said plurality of second conductive portions adjoined to one of said plurality of second conductive sidewalls, each one of said plurality of second conductive portions formed opposite one of said plurality of magnetic sections from one of said plurality of first conductive layers.    
     
     
         66 . The method of  claim 65  further including the step of forming a dielectric material between each of said plurality of magnetic sections and over said plurality of first and second conductive portions.  
     
     
         67 . The method of  claim 66  used to fabricate an inductor array between a voltage regulator module array and an integrated circuit die.  
     
     
         68 . The method of  claim 66  wherein said dielectric material is a solder resist.  
     
     
         69 . The method of  claim 68  further comprising forming openings in said dielectric material to expose a portion of said plurality of first and second conductive portions and filling said openings with conductive material.  
     
     
         70 . The method of  claim 69  wherein said openings are filled by electrolytic plating.  
     
     
         71 . The method of  claim 65  wherein said plurality of first conductive sidewalls and said plurality of second conductive sidewalls are formed by vias.  
     
     
         72 . The method of  claim 66  wherein said plurality of magnetic sections have a relative permeability about 300.

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